ISLPED 2004:
Newport Beach, California, USARajiv V. Joshi , Kiyoung Choi , Vivek Tiwari , Kaushik Roy (Eds.):
Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004, Newport Beach, California, USA, August 9-11, 2004.
ACM 2004 Circuit challenges for scaled technologies
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Microarchitecural techniques for power reduction
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Cache and bus design
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System design methodologies
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Deming Chen ,
Jason Cong :
Delay optimal low-power circuit clustering for FPGAs with dual supply voltages.
70-73
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Technologies and devices for low-power
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Power optimizations for cache memory
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Chia-Lin Yang ,
Chien-Hao Lee :
HotSpot cache: joint temporal and spatial locality exploitation for i-cache energy reduction.
114-119
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Leakage analysis and optimization
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conf/islped/BabighianBMM04 export record as
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conf/islped/KhandelwalS04 export record as
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Dexin Li ,
Pai H. Chou :
Maximizing efficiency of solar-powered systems by load matching.
162-167
Power supply, voltage, and frequency management
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Power-efficient bus design
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High level power modeling and analysis
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Circuit technologies
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conf/islped/ChatterjeeSK04
Low power converter circuits
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conf/islped/SchromHHKGNKD04 export record as
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conf/islped/GregoriLLLM04 export record as
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Circuits for low power wireless
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conf/islped/VerhelstVSD04 export record as
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conf/islped/Ali-BakhshianS04
Power efficient design for arithmetic circuits
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Energy efficient architectural techniques
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Kim M. Hazelwood ,
David Brooks :
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization.
326-331
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Diana Marculescu :
Application adaptive energy efficient clustered architectures.
344-349
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Wireless application drivers for low-power systems
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conf/islped/RaghunathanPWNJ04 export record as
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Adaptive voltage scaling
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