Vancouver, BC, Canada - Volume 2
, Ling Guan
: Content-based image retrieval with automated relevance feedback over distributed peer-to-peer network.
, Ling Guan
: Interactive content-based image retrieval using Laplacian mixture model in the wavelet domain.
Sang Hyun Kim
, Rae-Hong Park
: A novel approach to video sequence matching using color and edge features with the modified Hausdorff distance.
, Yuntao Qian
: Face recognition with the robust feature extracted by the generalized Foley-Sammon transform.
: On the security of structural information extraction/embedding for images.
, Yap-Peng Tan
: A probabilistic reasoning approach to closed-room people monitoring.
, C. C. Jay Kuo
: Low-variance TCP-friendly throughput estimation for congestion control of layered video multicast.
, Andrea Neviani
: A low-power decimation filter for a sigma-delta converter based on a power-optimized sinc filter.
, Chi-Ying Tsui
: Dynamic reconfigurable bus encoding scheme for reducing the energy consumption of deep sub-micron instruction bus.
: Low power decoding of BCH codes.
, Tong Zhang
: Joint code-encoder-decoder design for LDPC coding system VLSI implementation.
, In-Cheol Park
: Memory-based low density parity check code decoder architecture using loosely coupled two data-flows.
, Pinaki Mazumder
: Fast thermal analysis for VLSI circuits via semi-analytical Green's function in multi-layer materials.
, Eby G. Friedman
: Energy efficient dual threshold voltage dynamic circuits employing sleep switches to minimize subthreshold leakage.
Mark G. Arnold
: Geometric-mean interpolation for logarithmic number systems.
Keshab K. Parhi
: Novel pipelining of MSB-first add-compare select unit structure for Viterbi decoders.
: Managing inductive coupling in wide signal busses.
, Ming-Dou Ker
: A new Schmitt trigger circuit in a 0.13 µm 1/2.5 V CMOS process to receive 3.3 V input signals.
, Ming-Dou Ker
: Design on mixed-voltage-tolerant I/O interface with novel tracking circuits in a 0.13-µm CMOS technology.
Volnei A. Pedroni
: Compact Hamming-Comparator-based rank order filter for digital VLSI and FPGA implementations.
, Zeljko Zilic
: A novel scheme of implementing high speed AWGN communication channel emulators in FPGAs.
, Lee-Sup Kim
: A high performance low power dynamic PLA with conditional evaluation scheme.
, Michael Y. Jin
: On board processor development for NASA's spaceborne imaging radar with VLSI system-on-chip technology.
, Yeong-Kang Lai
: VLSI architecture of the reconfigurable computing engine for digital signal processing applications.
, Kiyoung Choi
: Application-specific configuration of multithreaded processor architecture for embedded applications.