Vancouver, BC, Canada - Volume 1
: A 28mW 10b 80MS/s pipelined ADC in 0.13µm CMOS.
: 6.61MHz to 317MHz nth-order current-mode low-pass and high-pass OTA-only-without-C filter.
, Omid Shoaei
: A 10-bit, 3.3-V, 60MSample/s, combined radix<2 and 1.5-bit/stage pipelined analog-to-digital converter.
, Yan Wah Chia
: Design of a SiGe low-noise amplifier for 3.1-10.6 GHz ultra-wideband radio.
, John R. Long
: A feedforward compensated high-linearity differential transconductor for RF applications.
, Sandip Tiwari
: A power-performance adaptive low voltage analog circuit design using independently controlled double gate CMOS technology.
: Spectral analysis of signals experiencing nonstationary stochastic time-shifts.
Igor M. Filanovsky
: Reactance network shaping a sinusoidal pulse with sinusoidal envelope of finite duration.
: Active RC networks: what benefit is there in having conjugate real zeros in the second-order transfer function?
, Georges G. E. Gielen
: Modelling of the impact of the current source output impedance on the SFDR of current-steering CMOS D/A converters.
: A CMOS bandgap reference with correction for device-to-device variation.
, Jaesik Lee
: Direct RF sampling continuous-time bandpass Delta-Sigma A/D converter design for 3G wireless applications.
Wern Ming Koe
, Franco Maloberti
: Feed-forward path and gain-scaling - a swing and distortion reduction scheme for second order sigma-delta modulator.
, Akinori Nishihara
: Fast and efficient algorithm to design noise-shaping FIR filters for high-order overload-free stable sigma-delta modulators.
: An improved frequency compensation techinique for low power, low voltage CMOS amplifiers [techinique read technique].
Andre Vilas Boas
, Alfredo Olmos
: A temperature compensated digitally trimmable on-chip IC oscillator with low voltage inhibit capability.
: Fault modeling of RF blocks based on noise analysis.
: A fixed transconductance bias technique for CMOS analog integrated circuits.
, Hong-Yi Huang
: A low-voltage CMOS rail-to-rail operational amplifier using double p-channel differential input pairs.
: Configurable direct-conversion / superheterodyne baseband down-link channel for W-CDMA applications.
: A minimization of the charge injection in switched-current circuits.
: An input-free NMOS V/sub T/ extractor circuit in presence of body effects.
Kambiz K. Moez
: An integrated a-Si TFT demultiplexer for driving gate lines in active-matrix arrays.
, Mani Soma
: On-chip calibration technique for delay line based BIST jitter measurement.
M. N. Hamid Reza Sadr
: A novel approach to the linearization of the differential transconductors.
: A frequency digitizer based on the continuous time phase domain noise shaping.
, Yiannos Manoli
: A continuous-time field programmable analog array (FPAA) consisting of digitally reconfigurable G/sub M/-cells.
, Mark F. Bocko
: Sigma-delta analog to digital converter architecture based upon a modulator design employing a mirrored integrator.