ISCAS 2001:
Sydney, Australia - Volume 4
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conf/iscas/McCormickGTAE01 export record as
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T. Shimamura :
Nonuniform amplitude division for ABLMS equalisation.
49-52
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Yeong-Kang Lai ,
Yu-Chuan Shu :
VLSI architecture design and implementation for BLOWFISH block cipher with secure modes of operation.
57-60
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conf/iscas/Montiel-NelsonASNN01 export record as
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conf/iscas/Moncunil-GenizMP01 export record as
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F. S. Tsai ,
Chen-Yi Lee :
A novel single-bit input all digital synchronizer and demodulator baseband processor for fast frequency hopping system.
132-135
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K. Y. Cheung :
CRRDL: a novel charge recovery-recycling differential logic.
152-153
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conf/iscas/AbaskharounHR01 export record as
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Wen-Tsong Shiue :
Leakage power estimation and minimization in VLSI circuits.
178-181
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conf/iscas/WroblewskiSSN01 export record as
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T. Santti ,
Jouni Isoaho :
Modified SRCMOS cell for high-throughput wave-pipelined arithmetic units.
194-197
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conf/iscas/LustenbergerL01 export record as
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M. Traber :
A novel ACS-feedback scheme for generic, sequential Viterbi-decoder macros.
210-213
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M. Traber :
A low power survivor memory unit for sequential Viterbi-Decoders.
214-217
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conf/iscas/VichienchomCL01 export record as
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Yuyu Chang ,
Jack Wills ,
John Choma Jr. :
On-chip automatic direct tuning circuitry based on the synchronous rectification scheme for CMOS gigahertz band front-end filters.
246-249
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Chi-Li Yu ,
An-Yeu Wu :
An improved time-recursive lattice structure for low-latency IFFT architecture in DMT transmitter.
250-253
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Scott D. Huss ,
John Bennett :
An efficient model for twisted-pair cables with discontinuities and stubs for discrete time simulations.
254-257
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B. Siddik Yarman ,
Ahmet Aksen :
A reflectance-based computer aided modelling tool for high speed/high frequency communication systems.
270-273
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conf/iscas/Abd-El-BarrSA01 export record as
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conf/iscas/NakadaIKNOSI01 export record as
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conf/iscas/MortezapourL01 export record as
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Shyue-Win Wei :
Cellular-array power-sum circuits over programmable finite field GF(2''').
346-349
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conf/iscas/Lopez-ValcarceD01 export record as
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Xiaopeng Li ,
Mohammed Ismail :
A single-chip CMOS front-end receiver architecture for multi-standard wireless applications.
374-377
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Hung Yan Cheung ,
King Sau Cheung ,
J. Lau :
A low power monolithic AGC with automatic DC offset cancellation for direct conversion hybrid CDMA transceiver used in telemetering.
390-393
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conf/iscas/MagesacherONLIB01 export record as
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conf/iscas/SalminenHKKS01 export record as
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conf/iscas/JagasivamaniH01 export record as
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conf/iscas/FornaciariSSZ01 export record as
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Chang-Ki Kwon ,
Kwyro Lee :
Reconfigurable and programmable minimum distance search engine for portable video compression systems.
542-545
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conf/iscas/RajagopalanS01 export record as
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V. K. Jain :
Hybrid wavelet/spread-spectrum system for broadband wireless LANs.
554-557
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conf/iscas/SathananathanT01 export record as
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Lijun Gao ,
Keshab K. Parhi :
Custom VLSI design of efficient low latency and low power finite field multiplier for Reed-Solomon codec.
574-577
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R. Becker :
Control loop for optimization of power consumption in VLSI designs.
602-605
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U. Singh ,
M. Green :
New structures for very high-frequency CMOS clock dividers.
622-625
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conf/iscas/Mahmoodi-MeimandA01 export record as
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conf/iscas/KazakovaSDML01 export record as
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Jiun-In Guo :
A low cost 2-D inverse discrete cosine transform design for image compression.
658-661
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Jiun-In Guo :
A new DA-based array for one dimensional discrete Hartley transform.
662-665
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S. Michael ,
R. Pieper :
A VLSI implementation of a universal programmable low sensitivity sampled data filter.
674-677
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conf/iscas/StankovicSAE01 export record as
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conf/iscas/MiyashitaINSO01 export record as
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Ping Wu ,
Kai He :
A CMOS triple-band fractional-N frequency synthesizer for GSM/GPRS/EDGE applications.
706-709
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Pietro Andreani :
A 1.8-GHz monolithic CMOS VCO tuned by an inductive varactor.
714-717
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conf/iscas/HamalainenHHCS01 export record as
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conf/iscas/MitsuyamaAOS01 export record as
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conf/iscas/AlbuquerqueS01 export record as
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Ming-Dou Ker ,
Tung-Yang Chen :
Design on the turn-on efficient power-rail ESD clamp circuit with stacked polysilicon diodes.
758-761
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conf/iscas/Christensen01a K. T. Christensen :
Design and optimization of CMOS switches for switched tuning of LC resonators.
770-773
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conf/iscas/MoisiadisBAD01 export record as
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conf/iscas/BrynjolfsonZ01 export record as
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conf/iscas/BouchakourHCBM01 export record as
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Ye Lu ,
Mourad N. El-Gamal :
A 2.3 V low noise, low power, 10 GHz bandwidth Si-bipolar transimpedance preamplifier for optical receiver front-ends.
834-837
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Yigang He ,
Yichuang Sun :
Fault isolation in nonlinear analog circuits with tolerance using the neural network-based L1-norm.
854-857
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T. Ohira :
Emerging adaptive antenna techniques for wireless ad-hoc networks.
858-861
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Y. Dumonteix ,
Y. Bajot ,
H. Mehrez :
A fast and low-power distance computation unit dedicated to neural networks, based on redundant arithmetic.
878-881
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conf/iscas/WatanabeSTNS01 export record as
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conf/iscas/KawaguchiZLS01 export record as
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