24. ICPP 1995: Urbana-Champain, Illinois, USA - Volume 1

Prithviraj Banerjee (Ed.): Proceedings of the 1995 International Conference on Parallel Processing, August 14-18, 1995, Urbana-Champain, Illinois, USA. Volume I: Architecture. CRC Press, ISBN 0-8493-2615-X

Practical Multiprocessors

Andreas Nowatzyk, Gunes Aybay, Michael C. Browne, Edmund J. Kelly, Michael Parkin, Bill Radke, Sanjay Vishin: The S3.mp Scalable Shared Memory Multiprocessor. 1-10
Thomas L. Sterling, Daniel Savarese, Donald J. Becker, John E. Dorband, Udaya A. Ranawake, Charles V. Packer: BEOWULF: A Parallel Workstation for Scientific Computation. 11-14
T. J. Reynolds, M. E. Waite, F. Z. Ieromnimon: PACE: Fine-Grained Parallel Graph Reducion. 15-18
Shigeki Yamada, Satoshi Tanaka, Katsumi Maruyama: A Message-Coupled Architecture (MESCAR) for Distributed Shared-Memory Multiprocessors. 19-23
Charles Severance, Richard J. Enbody, Steven Wallach, Brad Funkhouser: Automatic Self-Allocating Threads (ASAT) on the Convex Exemplar. 24-31

Networks

Lionel M. Ni, Yadong Gui, Sherry Moore: Performance Evaluation of Switch-Based Wormhole Networks. 32-40
Michael Jurczyk, Thomas Schwederski: Switch Box Architecture for Saturation Tree Effect Minimization in Multistage Interconnection Networks. 41-45
Clement W. H. Lam, Hong Jiang, V. Carl Hamacher: Design and Analysis of Hierarchical Ring Networks for Shared-Memory Multiprocessors. 46-50
Govindan Ravindran, Michael Stumm: Hierarchical Ring Topologies and the Effect of Their Bisection Bandwidth Constraints. 51-55
Yashovardhan R. Potlapalli, Dharma P. Agrawal: Enhancing the Performance of HIMNs Using Express Links. 56-59

Routing

Ji-Yun Kim, Hyunsoo Yoon, Seung Ryoul Maeng, Jung Wan Cho: Drop-and-Reroute: A New flow Control Policy for Adaptive Wormhole Routing. 60-67
Hyun Suk Lee, Howon Kim, Jong Kim, Sunggu Lee: Adaptive Virutal Cut-through as an Alternative to Wormhole Routing. 68-75
Yu-Chee Tseng, Sandeep K. S. Gupta: All-to-All Personalized Communication in a Wormhole-Routed Torus. 76-79
Philippe Michallon, Denis Trystram: Minimum Depth Arcs-Disjoint Spanning Trees for Broadcasting on Wrap-Around Meshes. 80-83

Networks and Routing

SangHo Chae, Jong Kim, Dongseung Kim, Sung Je Hong, Sunggu Lee: DTN: A New Partitionable Torus Topology. 84-91
Si-Qing Zheng: Sparse Hypernetworks Based on Steiner Triple Systems. 92-95
D. Frank Hsu, David S. L. Wei: Permutation Routing and Sorting on Directed de Bruijn Networks. 96-100
Young-Joo Suh, Binh Vien Dao, José Duato, Sudhakar Yalamanchili: Software Based Fault-Tolerant Oblivious Routing in Pipelined Networks. 101-105
Younes M. Boura, Chita R. Das: Fault-Tolerant Routing in Mesh Networks. 106-109

Fault Tolerance

Manoj Franklin: Incorporating Fault Tolerance in the Multiscalar Fine-Grain Parallel Processor. 110-117
Rajendra V. Boppana, Suresh Chalasani: Fault-Tolerant Multicast Communication for Multicomputers. 118-125
Oliver E. Theel, Brett D. Fleisch: Design and Analysis of Highly Availbalbe and Scalable Coherence Protocols for Distributed Shared Memory Systems Using Stochastic Modeling. 126-130
V. Purohit, Fabrizio Lombardi, Susumu Horiguchi, J. H. Kim: Diagnosing Multiple Bridge Faults in Baseline Multistage Interconnection Networks. 131-135

Memory and Disk Organization

Robert Y. Hou, Yale N. Patt: Track Piggybacking: An Improved Rebuild Algorithm for RAID5 Disk Arrays. 136-145
Sunil K. Mishra, Sudheer K. Vemulapalli, Prasant Mohapatra: Dual-Crosshatch Disk Array: A Highly Reliable Hybrid-RAID Architecture. 146-149
Henk L. Muller, Paul W. A. Stallard, David H. D. Warren: The Application of Skewed-Associative Memories to Cache Only Memory Architectures. 150-154
Jaques Jorda, Abdelaziz Mzoughi, Daniel Litaize: Multiple-Base Storage Scheme Theory-Applications to 2D and 3D Parallel Arrays. 155-158

Performance Evaluation and Modeling

Patricia J. Teller: Unscheduled Traces and Shared-Memory Multiprocessor Simulation. 159-162
Xiaodong Zhang, Yong Yan: A Framework of Performance Prediction of Parallel Computing on Nondedicated Heterogeneous NOW. 163-167
James J. Carrig Jr., Gerard G. L. Meyer: A Computational Model for a Class of Synchronized Distributed Memory Machines. 168-172
A. J. Field, Peter G. Harrison: An Analytical Model of the Standard Coherent Interface "SCI". 173-177

Shared Memory Multiprocessors

Henk L. Muller, Paul W. A. Stallard, David H. D. Warren: Hiding Miss Latencies with Multithreading on the Data Diffusion Machine. 178-185
Tomohiro Kudoh, Hideharu Amano, Takashi Matsumoto, Kei Hiraki, Yulu Yang, Katsunobu Nishimura, Koichi Yoshimura, Yasuhito Fukushima: Hierarchical Bit-Map Directory Schemes on the RDT Interconnection Network for a Massively Parallel Processor JUMP-1. 186-193
Gautam Shah, Aman Singla, Umakishore Ramachandran: The Quest for a Zero Overhead Shared Memory Parallel Machine. 194-201

Memory Organization

Donald Johnson, David J. Lilja, John Riedl: A Circulating Active Barrier Synchronization Mechanism. 202-209
Martin C. Herbordt, Charles C. Weems: Experimental Analysis of Some SIMD Array Memory Hierarchies. 210-214
Pohua P. Chang, Utpal Banerjee: Profile-Guided Multi-Heuristic Branch Prediction. 215-218

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