16. ICECS 2009: Yasmine Hammamet, Tunesia

• Gregorio Cappuccino, Francesco A. Amoroso, Andrea Pugliese:
  Class-AB output stage design for high-speed three-stage op-amps. 1-4
  
• Francesco A. Amoroso, Andrea Pugliese, Gregorio Cappuccino:
  Design considerations for fast-settling two-stage Miller-compensated operational amplifiers. 5-8
  
• Georg Ellguth, Stephan Henker, Christian Mayr, René Schüffny:
  Current conveyor based amplifier and adaptive buffer for use in an analog frontend. 9-12
  
• Yarallah Koolivand, Mohammad Yavari, Omid Shoaei, Ali Fotowat-Ahmady:
  Low voltage low power techniques in design of zero IF CMOS receivers. 13-16
  
• Masayuki Ikebe, Daisuke Ueo, Kazuhiro Takahagi, Masaki Ohuno, Yusuke Takada, Eiichi Sano:
  A 3.1-10.6 GHz RF CMOS circuits monolithically integrated with dipole antenna. 17-20
  
• Haddad Fayrouz, Wenceslas Rahajandraibe, Zaid Lakhdar, Oussama Frioui, Rachid Bouchakour:
  Radio frequency tunable polyphase filter design. 21-24
  
• Johannes Uhlig, René Schüffny, Harald Neubauer, Johann Hauer, Joachim Haase:
  A low-power continuous-time incremental 2nd-order-MASH ΣΔ-modulator for a CMOS imager. 33-36
  
• Enrique Prefasi, Ernesto Pun, Luis Hernández, Susanna Patón:
  Second-order multi-bit ΣΔ ADC using a Pulse-Width Modulated DAC and an integrating quantizer. 37-40
  
• Mohammad Hossein Maghami, Mohammad Yavari:
  A double-sampled hybrid CT/DT SMASH ΣΔ modulator for wideband applications. 41-44
  
• Maarten De Bock, Pieter Rombouts:
  A double-sampling cross noise-coupled split ΣΔ-modulation A/D converter with 80 dB SNR. 45-48
  
• Mahdi Kashmiri, Kofi A. A. Makinwa, Lucien J. Breems:
  A multi-bit cascaded sigma-delta modulator with an oversampled single-bit DAC. 49-52
  
• Marco Bucci, Luca Giancane, Raimondo Luzzi, Giuseppe Scotti, Alessandro Trifiletti:
  Delay-based dual-rail pre-charge logic. 53-56
  
• Massimo Alioto, Gaetano Palumbo, Melita Pennisi:
  Analysis of the impact of random process variations in CMOS tapered buffers. 57-60
  
• Alexander Skavantzos, Mohammad Abdallah, Thanos Stouraitis, Dimitrios M. Schinianakis:
  Design of a balanced 8-modulus RNS. 61-64
  
• Yngvar Berg:
  Novel high speed and ultra low voltage CMOS flip-flop. 65-68
  
• Alain J. Martin:
  Asynchronous logic for high variability nano-CMOS. 69-72
  
• Laurent Remy, Philippe Coll, Fabrice Picot, Philippe Mico, Jean Michel Portal:
  Definition of an innovative filling structure for digital blocks : the DFM filler cell. 73-76
  
• Patrik Kimfors, Niklas Broman, Andreas Haraldsson, Kasyab P. Subramaniyan, Magnus Själander, Henrik Eriksson, Per Larsson-Edefors:
  Custom layout strategy for rectangle-shaped log-depth multiplier reduction tree. 77-80
  
• Cristiano Lazzari, Adriel Ziesemer, Ricardo Reis:
  An automated design methodology for layout generation targeting power leakage minimization. 81-84
  
• Massimo Alioto, Luca Giancane, Giuseppe Scotti, Alessandro Trifiletti:
  Leakage Power Analysis attacks: Theoretical analysis and impact of variations. 85-88
  
• Sebastian M. Londono, José Pineda de Gyvez:
  An energy-aware multiplier based on a Configurable-Reuse of points design methodology. 89-92
  
• Fuminori Kobayashi, Yuhta Egashira, Hitoshi Kondoh:
  A PLL configuration for reducing both incoming and inherent jitters. 93-96
  
• Vassilios A. Chouliaras, Panagiotis Galiatsatos, Kostantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos:
  Efficient cascaded VLSI FFT architecture for OFDM systems. 97-100
  
• Mohamed A. Abd El-Ghany, Magdy A. El-Moursy, Darek Korzec, Mohammed Ismail:
  High Throughput architecture for OCTAGON Network on Chip. 101-104
  
• Mohamed A. Abd El-Ghany, Magdy A. El-Moursy, Darek Korzec, Mohammed Ismail:
  Power efficient Networks on Chip. 105-108
  
• Thaísa Leal da Silva, Bruno Zatt, Altamiro Amadeu Susin, Sergio Bampi, Luciano Volcan Agostini:
  High throughput scalable Motion Compensation architecture for H.264/SVC video coding standard. 109-112
  
• Kazeem Alagbe Gbolagade, Sorin Dan Cotofana:
  A reverse converter for the new 4-moduli set {2n + 3, 2n + 2, 2n + 1, 2n}. 113-116
  
• Ahmet Korhan Tanc, Ender M. Eksioglu, Ahmet H. Kayran:
  Adaptive multirate signal estimation with lattice orthogonalization. 117-119
  
• Marta Turrillas, Ainhoa Cortés, Igone Vélez, Juan F. Sevillano, Andoni Irizar:
  An FFT core for DVB-T2 receivers. 120-123
  
• Kazunari Kato, Yasuhiro Takahashi, Toshikazu Sekine:
  A new horizontal and vertical common subexpression elimination method for multiple constant multiplication. 124-127
  
• Davide Marano, Gaetano Palumbo, Salvatore Pennisi:
  An efficient RNM compensation topology with voltage buffer and nulling resistors for large-capacitive-load three-stage OTAs. 128-131
  
• Davide Marano, Gaetano Palumbo, Salvatore Pennisi:
  A high-speed low-power output buffer amplifier for large-size LCD applications. 132-135
  
• George Raikos, Spiridon Vlassis:
  Low-voltage differential amplifier. 136-139
  
• Tomoki Iida, Tetsuya Asai, Eiichi Sano, Yoshihito Amemiya:
  Offset cancellation with subthreshold-operated feedback circuit for fully differential amplifiers. 140-143
  
• Yngvar Berg:
  Ultra low voltage semi-floating-gate transconductance amplifier based on binary inverters. 144-147
  
• G. A. V. Sai Praneeth, Anil K. Saini:
  A self biased operational amplifier at ultra low power supply voltage. 152-154
  
• Gaetano Palumbo, Melita Pennisi, Salvatore Pennisi:
  Exploitation of the phasor approach for closed-form solution of the Van der Pol's oscillator and sinusoidal oscillators with high-order nonlinearity. 155-158
  
• George Raikos, Spiridon Vlassis:
  Low-voltage CMOS voltage squarer. 159-162
  
• Andrzej Pulka, Lukasz Golly:
  A heterogenous approach to symbolic calculations based on structural numbers. 163-166
  
• Ulkarsh Shah, Kamal El-Sankary, Ezz I. El-Masry:
  A charge sampling baseband filter using a new high linearity Gm for multimode receiver. 171-174
  
• Zihua Qu, Meng Zhang, Jianhui Wu:
  A switched-capacitor CMOS voltage reference for ultra low-voltage and ultra low-power operation. 175-178
  
• Zhiqiang Gao, Jinxiang Wang, Fengchang Lai, Mingyan Yu, Zhongzhao Zhang:
  Wideband reconfigurable CMOS Gm-C filter For wireless applications. 179-182
  
• Murat Isikhan, Torsten Reich, André Richter, Eckhard Hennig:
  A new low voltage bandgap reference topology. 183-186
  
• Marcello De Matteis, Tommaso Vergine, Giuseppe Cocciolo, Andrea Baschirotto, Matteo Conta:
  A programmable active-RC complex filter for wireless communications. 187-190
  
• Marcello De Matteis, Stefano D'Amico, Piero Andriulo, Giuseppe Cocciolo, Andrea Baschirotto:
  A 4^th order CMOS 65nm wideband low power analog filter for wireless receivers. 191-194
  
• Christian Jesús B. Fayomi, Gilson I. Wirth, David Binkley, Akira Matsuzawa:
  An experimental 0.6-V 57.5-fJ/conversion-step 250-kS/s 8-bit rail-to-rail successive approximation ADC in 0.18µm CMOS. 195-198
  
• Nabil Ghannay, Abdelaziz Samet:
  E-Shaped Patch Antenna modeling with MoM and RWG basis functions. 199-202
  
• Davide Dermit, Fabio Ducati, Damenico Balsamo, Paolo Lucchi, Mattia Borgarino, Gilles Jacquemod:
  A 130nm CMOS tunable digital frequency divider for dual-band microwave radiometer. 203-206
  
• Alexandru Gheorghe, Florin Constantinescu, Miruna Nitescu:
  Error control in circuit transient analysis. 207-210
  
• Gihad Elamary, E. Graeme Chester, Jeffrey Neasham:
  An analysis of wireless inductive coupling for High Data Rate biomedical telemetry using a new VHDL n-PSK modulator. 211-214
  
• Karol Grandez, Paul Bustamante, Gonzalo Solas, Iñaki Gurutzeaga, Andrés Garcia-Alonso:
  Wearable wireless sensor for the gait monitorization of Parkinsonian patients. 215-218
  
• Takamoto Watanabe, Tomohito Terasawa:
  An all-digital ADC/TDC for sensor interface with TAD architecture in 0.18-µm digital CMOS. 219-222
  
• Paul-Vahe Cicek, Sareh Mahdavi, Frederic Nabki, Mourad N. El-Gamal:
  Low actuation voltage silicon carbide RF switches for MEMS above IC. 223-226
  
• Marco Grassi, Vincenzo Ferragina, Piero Malcovati, Stefano Caccia, Giuseppe Bertuccio, Didier Martin, Paolo Bastia, Ivan Cappelluti, Nicoletta Ratti:
  A 32 × 32 channels, 3-cm², 555-mW chip for X-ray pixel detector read-out. 227-230
  
• Bouzid Mhamdi, Khaled Grayaa, Taoufik Aguili:
  An inverse scattering approach using hybrid PSO-RBF network for microwave imaging purposes. 231-234
  
• Samuel Riviere, Frederic Alicalapa, Alexandre Douyere, Jean-Daniel Lan Sun Luk, Brigitte Grondin-Perez:
  An integrated model of a wireless power transportation for RFID and WSN applications. 235-238
  
• Bernardo Leite, Eric Kerherve, Jean-Baptiste Begueret, Didier Belot:
  Shielding structures for millimeter-wave integrated transformers. 239-242
  
• Tvrtko Mandic, Filip Vanhee, Renaud Gillon, Johan Catrysse, Adrijan Baric:
  Equivalent circuit model of the TEM cell electric and magnetic field coupling to microstrip lines. 247-250
  
• Elisenda Roca, Mourad Fakhfakh, Rafael Castro-López, Francisco V. Fernández:
  Applications of evolutionary computation techniques to analog, mixed-signal and RF circuit design - an overview. 251-254
  
• Ivick Guerra-Gómez, Esteban Tlelo-Cuautle, Trent McConaghy, Georges G. E. Gielen:
  Optimizing current conveyors by evolutionary algorithms including differential evolution. 259-262
  
• Yann Cooren, Patrick Siarry, Mourad Fakhfakh:
  Application of MO-TRIBES to the design of analog electronic circuits. 263-266
  
• Bo Liu, Francisco V. Fernández, Dimilri De Jonghe, Georges G. E. Gielen:
  Less expensive and high quality stopping criteria for MC-based analog IC yield optimization. 267-270
  
• Takamoto Watanabe, Shigenori Yamauchi, Tomohito Terasawa:
  A 0.0027-mm² 9.5-bit 50-MS/s all-digital A/D converter TAD in 65-nm digital CMOS. 271-274
  
• Massimo Alioto, Elio Consoli, Gaetano Palumbo:
  Optimum clock slope for flip-flops within a clock domain: Analysis and a case study. 275-278
  
• Andrea Cantillo, Antonietta De Nardo, Nicola Femia, Walter Zamboni:
  Scoring criteria for the selection of capacitors in DC to DC converters design. 287-290
  
• Chun-Yu Hsieh, Young-Sheng Wei, Ke-Horng Chen, Tseng-Chun Lin:
  Efficienct LED driver with an adaptive reference tracking technique. 291-294
  
• Andrea Cantillo, Antonietta De Nardo, Nicola Femia, Walter Zamboni:
  A unified model for filter capacitor constraints in DC to DC switching converters design. 295-298
  
• Massimo Ferri, Daria Pinna, Piero Malcovati, Enrico Dallago, Giulio Ricotti:
  Integrated stabilized photovoltaic energy harvester. 299-302
  
• Zoran Stamenkovic, Emilija Miletic, Milos Obrknezev, Klaus Tittelbach-Helmrich:
  MAC protocol implementation in RF-MIMO WLAN. 303-306
  
• Amel Haji, Asma Ben Letaifa, Sami Tabbane:
  Integration of WLAN, UMTS and WiMAX in 4G. 307-310
  
• Rami Ben Amira, Dorra Ayadi, Inès Kammoun, Mourad Loulou:
  Methodology of a system level design for a Cognitive Radio receiver "application for IEEE 802.22 Standard". 319-322
  
• Anargyros Drolapas, George Lentaris, Dionysios I. Reisis:
  Programmable Motion Estimation architecture. 323-326
  
• Mohamad Adnan Al-Alaoui:
  Discretization methods of fractional parallel PID controllers. 327-330
  
• Marcelo Schiavon Porto, Sergio Bampi, João S. Altermann, Eduardo Costa:
  Power efficient architecture for motion estimation using the QSDS-DIC algorithm. 331-334
  
• Abdelaziz Trabelsi, Mounir Boukadoum, Francois-Raymond Boyer:
  Robust estimation of LP parameters in white noise with unknown variance. 335-338
  
• Eslam Yahya, Laurent Fesquet:
  Asynchronous design: A promising paradigm for electronic circuits and systems. 339-342
  
• Jim D. Garside, Stephen B. Furber, Steve Temple, Viv Woods:
  The Amulet chips: Architectural development for asynchronous microprocessors. 343-346
  
• Jens Sparsø:
  Current trends in high-level synthesis of asynchronous circuits. 347-350
  
• Sylvain Guilley, Sumanta Chaudhuri, Laurent Sauvage, Jean-Luc Danger, Taha Beyrouthy, Laurent Fesquet:
  Updates on the potential of clock-less logics to strengthen cryptographic circuits against side-channel attacks. 351-354
  
• Mohammed Alshaikh, David Kinniment, Alex Yakovlev:
  On the trade-off between resolution time and delay times in bistable circuits. 355-358
  
• Rolf Becker, Vinzenz Maurer, Roland Ryter:
  Multi-mode baseband transmit path for EDGE, TD-SCDMA, and WCDMA in 45-nm CMOS. 359-362
  
• Chun-Yu Hsieh, Chih-Yu Yang, Ke-Horng Chen:
  A low-dropout regulator with smooth peak current control (SPCC) topology for over current protection. 363-366
  
• Tien-Yu Lo, Chih-Lung Kuo, Chung-Chih Hung, Chi-Hsiang Lo:
  A 250MHz Gm-C filter using negative current feedback OTAs. 367-370
  
• Hoi Lee:
  A low-voltage low-power comparator With current-controlled dynamically-biased preamplifiers For DCM buck regulators. 371-374
  
• Annajirao Garimella, Paul M. Furth:
  A 1.21V, 100mA, 0.1µF-10µF output capacitor low drop-out voltage regulator for SoC applications. 375-378
  
• Oualid Hammi, Fadhel M. Ghannouchi:
  Comparative study of recent advances in power amplification devices and circuits for wireless communication infrastructure. 379-382
  
• Chokri Jebali, Ali Gharsallah, Noureddine Boulejfen, Fadhel M. Ghannouchi:
  Performance assessment of RF power amplifier memory polynomial models under different signal statistics. 383-386
  
• Kimia Taghizadeh Ansari, Calvin Plett, Mustapha C. E. Yagoub:
  A low-power 0.4-22GHz CMOS cascode distributed amplifier for optical communication systems. 387-390
  
• Mohamed Gamal El Din, Bernd Geck, Hermann Eul:
  Improved inverse class-E matching network for microwave high power amplifiers. 391-394
  
• Sahel Abdinia, Mohammad Yavari:
  A new architecture for low-power high-speed pipelined ADCs using double-sampling and opamp-sharing techniques. 395-398
  
• Zhiguo Song, Caroline Lelandais-Perrault, Philippe Bénabès:
  Synthesis of complex subband Hybrid Filter Banks A/D converters using adaptive filters. 399-402
  
• Mehdi Saberi, Reza Lotfi:
  Analysis of the linearity of pipelined ADC due to capacitor non-linearity. 403-406
  
• Stefano D'Amico, Marcello De Matteis, Franco Grancagnolo, Marco Panareo, Roberto Perrino, Gabriele Chiodini, Alessandro Corvaglia, Giuseppe Cocciolo, Andrea Baschirotto:
  A low power 0.13µm ADC for drift chambers. 407-410
  
• Ehsan Rahiminejad, Reza Lotfi:
  A low-power architecture for integrating analog-to-digital converters. 411-414
  
• Dimitris Bekiaris, Sotirios Xydis, George Economakos, Kiamal Z. Pekmestzi:
  A design methodology for high-performance and low-leakage fixed-point transpose FIR filters. 415-418
  
• Carlos D. Moreno, Francisco J. Quiles, Manuel Ortiz, María Brox, Javier Hormigo, Julio Villalba, Emilio L. Zapata:
  Efficient mapping on FPGA of convolution computation based on combined CSA-CPA accumulator. 419-422
  
• Pedro Echeverría, Marisa López-Vallejo, Walter Bolognesi, Carlos A. López-Barrio:
  Exploring performance-power trade-offs for look-up tables in SRAM-based FPGAs. 423-426
  
• Shuli Gao, Dhamin Al-Khalili, Noureddine Chabini:
  Two level decomposition based matrix multiplication for FPGAs. 427-430
  
• Rui Marcelino, Horácio C. Neto, João M. P. Cardoso:
  Unbalanced FIFO sorting for FPGA-based systems. 431-434
  
• Atef Allam, Ian O'Connor, Emmanuel Drouard, Fabien Mieyeville, Alberto Scandurra:
  Optical NoC design-parameters exploration and analysis. 435-438
  
• Yassine Aydi, Ramzi Tligue, Maissa Elleuch, Mohamed Abid, Jean-Luc Dekeyser:
  A multi level functional verification of multistage interconnection network for MPSOC. 439-442
  
• Ning Chen, Bing Li, Ulf Schlichtmann:
  Sensitivity based parameter reduction for statistical analysis of circuit performance. 443-446
  
• Glauco B. V. dos Santos, Tiago Reimann, Marcelo de Oliveira Johann, Ricardo Augusto da Luz Reis:
  On the accuracy of Elmore-based Delay Models. 447-450
  
• Raimund Ubar, Dmitri Mironov, Jaan Raik, Artur Jutman:
  Structurally synthesized multiple input BDDs for simulation of digital circuits. 451-454
  
• Rammal Hussein, Olleik Charif, Najib Fadlallah, Mohamed Rammal, Patrick Vaudon:
  General synthesis method for cylindrical antenna arrays for directive and conformal pattern. 455-458
  
• L. Gargouri, Ridha Ghayoula, Najib Fadlallah, Ali Gharsallah, Mohamed Rammal:
  Steering an adaptive antenna array by LMS algorithm. 459-462
  
• Nicolae Chiurtu, Jaouhar Ayadi:
  Multi-User multiple antenna systems in Up-Link OFDM communications. 463-466
  
• Yosra Mlayeh, Fatma Rouissi, Fethi Tlili, Adel Ghazel:
  Improvement technique of channel estimation in OFDM-MIMO systems. 467-470
  
• Ali Mohammadi, Adib Abrishamifar, Ahmad Ayatollahi:
  A novel CMOS all-pass tunable phase shifter. 471-474
  
• Mustafa M. El-Muradi, Mohamed A. El-Mansouri:
  Modelling and analysis of scaled MOSFET devices and circuit simulation. 475-478
  
• Wei Xuan, Francis Calmon, Nicolas Baboux, Abdelkader Souifi:
  Discussion on the performances of hybrid SET-MOSFET Voltage Controlled Oscillators. 479-482
  
• Pierre-Emmanuel Gaillardon, Fabien Clermidy, Ian O'Connor, Renaud Daviot:
  Reconfigurable nanoscale logic cells : a comparison study. 483-486
  
• Kamel Dabboussi, Jalel Zrida:
  A dilated LMI approach to robust H∞ static state feedback controller synthesis. 491-494
  
• Kamel Ben Hamouda, Anis Sellami, Mekki Ksouri:
  A chattering free control approach based on dynamical multi-sliding surfaces. 495-498
  
• Rafael Trapani Possignolo, Omar Hammami:
  Optimized joint NARX ANN - embedded processor design methodology. 499-502
  
• Nazrul Anuar, Yasuhiro Takahashi, Toshikazu Sekine:
  Fundamental logics based on two phase clocked adiabatic static CMOS logic. 503-506
  
• Abdelkrim Kamel Oudjida, Mohamed Lamine Berrandjia, Rachid Tiar, Ahmed Liacha, K. Tahraoui:
  FPGA implementation of I²C & SPI protocols: A comparative study. 507-510
  
• Moez Hizem, Ridha Bouallegue:
  Study of different pulse waveforms and performance of TH-PPM Ultra Wideband Systems in multipath and multi-user environments simultaneously. 519-522
  
• Jan Zeleny, Patrick Wurm, Pierre Vincent, Andreas Kaiser:
  A digital Cartesian feedback path design for 2.4GHz ISM band standards. 523-526
  
• Nikolay N. Tchamov, Jukka Rinne, Ville Syrjälä, Mikko Valkama, Yaning Zou, Markku Renfors:
  VCO phase noise trade-offs in PLL design for DVB-T/H receivers. 527-530
  
• Mostafa Rashdan, Abdel Yousif, James W. Haslett, Brent Maundy:
  A new time-based architecture for serial communication links. 531-534
  
• Tapio Rapinoja, Kari Stadius, Jussi Ryynänen:
  Spectral purity analysis of integer-N PLL. 539-542
  
• Malek Naoues, Dominique Morche, Cedric Dehos, Rim Barrak, Adel Ghazel:
  Novel behavioral DAC modeling technique for WirelessHD system specification. 543-546
  
• Francesco Cannone, Giuseppe Coviello, Gianfranco Avitabile:
  A complete behavioral system model for a novel phase shifter technique. 547-550
  
• Antonio D. Reis, José F. Rocha, Atílio Gameiro, José P. Carvalho:
  Prefilter bandwidth effects on the sequential symbol synchronizers based on pulse comparation. 551-554
  
• Mahmoud Al-Qutayri, Saleh R. Al-Araji, Omar Al-Kharji Al-Ali, Nader Anani:
  Time delay digital tanlock loop with linearized phase detector. 555-558
  
• Said Sadoudi, Mohamed S. Azzaz, Camel Tanougast, Abbas Dandache:
  Real time hardware implementation of a new Duffing's chaotic attractor. 559-562
  
• Mohamed Reda Lakehal, Youcef Ferdi, Abdelmalik Taleb-Ahmed:
  Generation of FARIMA(0, α, 0) sequences by recursive filtering: Testing for self-similarity. 563-566
  
• Borhen Torchani, Anis Sellami, Radhi M'hiri, Germain Garcia:
  Control of saturated systems with sliding mode. 567-570
  
• Adel M. Sharaf, Mohamed A. El-Sayed:
  A novel hybrid Photovoltaic/Wave energy utilization system for island electricity. 571-574
  
• Mohieddine Benammar, Mohamed Bagher, Mohamed Al Kaisi:
  Novel linearizer for tangent/cotangent converter. 575-578
  
• Anna Arbat, Ángel Diéguez, David Gascon, Juan Trenado, Lluís Garrido:
  Avalanche photodiodes for high energy particle tracking in 130 nm CMOS technology. 579-582
  
• Karim Allidina, Mohammad Ali Taghvaei, Frederic Nabki, Paul-Vahe Cicek, Mourad N. El-Gamal:
  A MEMS-based vacuum sensor with a PLL frequency-to-voltage converter. 583-586
  
• Luigi Pinna, Ravinder S. Dahiya, Maurizio Valle:
  SPICE model for Piezoelectric Bender Generators. 587-590
  
• Marco Zanuso, Salvatore Levantino, Davide Tasca, Daniele Raiteri, Carlo Samori, Andrea L. Lacaita:
  A glitch-corrector circuit for low-spur ADPLLs. 595-598
  
• Ilias Pappas, Christoforos Theodorou, Stylianos Siskos, Charalambos A. Dimitriadis:
  A new linear voltage-to-current converter with threshold voltage compensation for analog circuits applications in polycrystalline silicon TFT process. 599-602
  
• Salvatore Levantino, Marco Zanuso, Davide Tasca, Carlo Samori, Andrea L. Lacaita:
  An all-digital architecture for low-jitter regulated delay lines. 603-606
  
• Skyler Weaver, Benjamin P. Hershberg, Pavan Kumar Hanumolu, Un-Ku Moon:
  A multiplexer-based digital passive linear counter (PLINCO). 607-610
  
• Martin Trojer, Ulrich Gaier, Mauro Cleris, Peter Pridnig, Wolfgang Pribyl:
  A 40mW pseudo-differential 200MHz analog video pre-processing for HDTV flat-panel displays. 611-614
  
• Soheil Ziabakhsh, Mahyar Nirouei, Alireza Saberkari, Hosein Alavi-Rad:
  Reduction parasitic capacitance in switching stage RF-CMOS Gilbert mixer for 2.4 GHz application. 615-618
  
• Martms Weststrate, Saurabh Sinha:
  Noise optimization of a wideband capacitive shunt-shunt feedback LNA design suitable for software-defined radio. 619-622
  
• Mathieu Périn, Olivier Aymard, Sébastien Darfeuille, Patrice Gamand, Corinne Berland:
  Low-power digitally-controlled variable gain LNA with high isolation for sub-GHz ISM bands. 623-626
  
• Aya Mabrouki, Thierry Taris, Yann Deval, Jean-Baptiste Begueret:
  A dual mode 2.4-GHz CMOS low noise amplifier employing body biasing. 627-630
  
• Francis Chan Wai Po, Emeric de Foucauld, Dominique Morche, Pierre Vincent, Renzo Dal Molin, Pascal Pons, Regis Pierquin, Eric Kerherve:
  A power optimized transconductance amplifier and its application to a 6^th order lowpass GmC filter. 631-634
  
• Saeid Hashemi, Mohamad Sawan, Yvon Savaria:
  A low-area power-efficient CMOS active rectifier for wirelessly powered medical devices. 635-638
  
• Ricardo Izquierdo, Florent Lefevre, Steen B. Schougaard, Muthukumaran Packirisam, Ashwin Acharya:
  Integration of polypyrrole microactuators and organic optoelectronic devices for lab-on-chip applications. 639-642
  
• Virgilio Valente, Andreas Demosthenous, Richard H. Bayford:
  Application of phased array systems to deep brain stimulation. 643-646
  
• Andrzej Pulka, Adam Milik:
  Multithread RISC architecture based on programmable interleaved pipelining. 647-650
  
• Zichu Qi, Hui Liu, Xiangku Li, Jun Xu, Weiwu Hu:
  A case study of improving at-speed testing coverage of a gigahertz microprocessor. 651-654
  
• Cristiano Calligaro, Valentino Liberali, Alberto Stabile:
  A radiation hardened 512 kbit SRAM in 180 nm CMOS technology. 655-658
  
• Walid Lafi, Didier Lattard, Ahmed Amine Jerraya:
  High level modelling and performance evaluation of address mapping in NAND flash memory. 659-662
  
• Yu-Ting Pai, Chia-Han Lee, Shanq-Jang Ruan, Edwin Naroska:
  An improved comparison circuit for low power pre-computation-based content-addressable memory designs. 663-666
  
• Xin Pan, Helmut Graeb:
  Degradation-aware analog design flow for lifetime yield analysis and optimization. 667-670
  
• Aymen Ladhar, Mohamed Masmoudi:
  Analysis and diagnosis of multiple simultaneous defects. 671-674
  
• Aymen Ladhar, Mohamed Masmoudi:
  A novel algorithm to extract open defects from industrial designs. 675-678
  
• Sayed Alireza Sadrossadat, Minoo Mirsaeedi, Kumaraswamy Ponnambalam, Mohab Anis:
  Framework for statistical design of a flip-flop. 679-682
  
• Amine Mezghani, Rafik Ghiat, Josef A. Nossek:
  Transmit processing with low resolution D/A-converters. 683-686
  
• Kaziiya Kojima, Yasuhiro Toriyama, Toru Taniguchi, Masaya Miyahara, Akira Matsuzawa:
  Development of baseband processing SoC with ultrahigh-speed QAM modem and broadband radio system for demonstration experiment thereof. 687-690
  
• Luis Lolis, Michaël Pelissier, Carolynn Bernier, Dominique Dallet, Jean-Baptiste Begueret:
  System design of bandpass sampling RF receivers. 691-694
  
• Naim Ben-Hamida, John Sitch, Philip Flemke, Daniel Pollex, Peter Schvan, Yuriy M. Greshishchev, Shing-Chi Wang, Chris Falt:
  Clock recovery for a 40 Gb/s QPSK optical receiver. 695-698
  
• Dong Wook Kim, Yeong Hee Cho, Kazushi Nishimoto, Yusuke Kawakami, Susumu Kunifuji, Hiroshi Ando:
  Development of aroma-Card based soundless Olfactory Display. 703-706
  
• Andreas Lankes, Andreas Herkersdorf, Sören Sonntag, Helmut Reinig:
  NoC topology exploration for mobile multimedia applications. 707-710
  
• Felipe Sampaio, Robson Dornelles, Daniel Palomino, Gabriel Siedler, Marcel Correa, Luciano Volcan Agostini:
  A multitransform architecture for the H.264/AVC standard and its design space exploration. 711-714
  
• Luís Martínez-Alvarado, Jordi Madrenas, Daniel Fernández:
  Translinear signal processing circuits in standard CMOS FPAA. 715-718
  
• Oscar Alonso, Lluis Freixas, Ángel Diéguez:
  A new procedure and driver to control brushless micromotors. 719-722
  
• Siwar Zribi Boujelbene, Dorra Ben Ayed Mezghanni, Noureddine Ellouze:
  Application of combining classifiers for text-independent speaker identification. 723-726
  
• Jochen Verbrugghe, Maarten De Bock, Pieter Rombouts:
  Design of an integrated analog controller for a class-D audio amplifier. 727-730
  
• Walaa Sahyoun, Philippe Benech, Jean-Marc Duchamp, Guy Parat, Pascal Ancey:
  A method reducing the time of RF test for Coupled Resonator Filters. 731-734
  
• Abdelkrim Medjahdi, Francis Calmon:
  Wideband 2.5 GHz VCO with active inductance in a 0.25 µm CMOS technology. 735-738
  
• Shengyang Wang, Jiafeng Zhu, Zhihua Qu, Jianhui Wu:
  Power efficient multimodulus programmable frequency divider with half-integer division ratio step size. 739-742
  
• Anna Dixon, Mohammed Ismail, Jad G. Atallah:
  Digital self-aware charge pump calibration technique for frequency synthesizers. 743-746
  
• Yang Lin, David E. Kotecki:
  A 312GHz fourth-harmonic voltage-controlled oscillator in 130nm SiGe BiCMOS technology. 747-750
  
• Luca Rossi, Steve Tanner, Pierre-André Farine:
  A 16-bit, 150-µW, 1-kS/s ADC with hybrid incremental and cyclic conversion scheme. 751-754
  
• Alonso Morgado, Rocío del Río Fernández, José Manuel de la Rosa:
  A flexible resonation-based cascade ΣΔ modulator with simplified cancellation logic. 755-758
  
• Hervé Caracciolo, Selçuk Talay, Franco Maloberti:
  Optimum selection of capacitive array for multibit Sigma-Delta modulators without DEM. 759-762
  
• Michael Figueiredo, Tomasz Michalak, João Goes, Luís Gomes, Pawel Sniatala:
  Improved clock-phase generator based on self-biased CMOS logic for time-interleaved SC circuits. 763-766
  
• Tuan Vu Cao, Dag T. Wisland, Tor Sverre Lande, Farshad Moradi:
  Low phase-noise VCO utilizing NMOS symmetric load for Frequency-based Delta-Sigma Modulators. 767-770
  
• David Stevens, Nick Glynn, Panagiotis Galiatsatos, Vassilios Chouliaras, Dionysios I. Reisis:
  Evaluating the performance of a configurable, extensible VLIW processor in FFT execution. 771-774
  
• Abdul N. Sazish, Mhd Saeed Sharif, Abbes Amira:
  Hardware implementation and power analysis of HWT for medical imaging. 775-778
  
• Hamid Reza Pourshaghaghi, José Pineda de Gyvez:
  Dynamic voltage scaling based on supply current tracking using fuzzy Logic controller. 779-782
  
• Houman Zarrabi, Asim J. Al-Khalili, Yvon Savaria:
  Estimation of energy performance in computing platforms. 783-786
  
• Mohammed Sayed:
  A fast architecture for exhaustive search block matching algorithm with MPEG-4 applications. 787-790
  
• Emna Amouri, Hayder Mrabet, Zied Marrakchi, Habib Mehrez:
  Placement and routing techniques to improve delay balance of WDDL netlist in MFPGA. 791-794
  
• Kasyab P. Subramaniyan, Emil Axelsson, Per Larsson-Edefors, Mary Sheeran:
  Layout exploration of geometrically accurate arithmetic circuits. 795-798
  
• Pedro Pereira, M. Helena Fino, Fernando V. Coito, Mário Ventim-Neves:
  ADISI- An efficient tool for the automatic design of integrated spiral inductors. 799-802
  
• Torsten Reich, Boyko Dimov, Christian Lang, Volker Boos, Eckhard Hennig:
  A post-layout optimization method with automatic device type selection for BiCMOS analog circuits. 803-806
  
• Sleiman Bou Sleiman, Mohammed Ismail:
  A CMOS amplitude detector for RF-BIST and calibration. 807-810
  
• Faouzi Zarai, Ikram Smaoui, Lotfi Kamoun, Mohammad M. Banat:
  Reducing handoff blocking probability in fourth generation wireless networks. 811-815
  
• Anh Tuan Phan, Tuan Vu Cao:
  Low power 4 x 5-Gb/s VCSEL driver array in 0.13-µm CMOS. 816-819
  
• Pedro Silva, Paulo Bartolomeu, José Alberto Fonseca:
  Implementing the FTT-L protocol with ZigBee. 820-823
  
• Mieso K. Denko, Mohammad S. Obaidat:
  Fairness and throughput optimization in wireless mesh networks. 824-827
  
• T. Thabuis, P. Villard, M. Belleville, G. Sicard, F. Pistone, P. Maillart, G. Decaens:
  On-chip data compression for I.R. image sensors. 828-831
  
• Mieso K. Denko, Isaac Woungang, Mohammad S. Obaidat:
  Trust management in opportunistic pervasive healthcare systems. 832-835
  
• Fernando Luís Herrmann, Guilherme Perin, Josue Paulo Jose de Freitas, Rafael Bertagnolli, João Baptista dos Santos Martins:
  A Gigabit UDP/IP network stack in FPGA. 836-839
  
• Georgina Flores Becerra, Said Polanco-Martagon, Esteban Tlelo-Cuautle:
  Fuzzy-set based approach to compute optimum sizes of Voltage Followers. 844-847
  
• Franciszek Balik:
  A semi - symbolic method of electronic circuit design by pole and zero distribution optimization using time - constants approximation. 848-851
  
• Sandro Sawicki, Gustavo Wilke, Marcelo de Oliveira Johann, Ricardo Reis:
  A cells and I/O pins partitioning refinement algorithm for 3D VLSI circuits. 852-855
  
• Esteban Tlelo-Cuautle, Elyoenai Martínez-Romero, Carlos Sánchez-López, Sheldon X.-D. Tan:
  Symbolic formulation method for mixed-mode analog circuits using nullors. 856-859
  
• Diomadson Belfort, Nicolas Beilleau, Hassan Aboushady, Marie-Minerve Louërat, Sebastian Yuri Cavalcanti Catunda:
  A Q-enhanced LC bandpass filter using CAIRO+. 860-863
  
• Chaouki Diab, Mohamad Oueidat:
  A new simply-designed scalar quantizer adaptable for any distribution. 864-867
  
• Peter Nilsson:
  Complexity reductions in unrolled CORDIC architectures. 868-871
  
• Saoussen Cheikhrouhou, Yousra Ben Jemaa, Amine Samet, Mohamed Ali Ben Ayed, Nouri Masmoudi:
  Toward an optimal residual frame coding for DWT based video codec. 876-879
  
• Pavel Zahradnik, Miroslav Vlcek:
  Extended design of equiripple comb FIR filters. 880-883
  
• Hassan Ezzaidi, Mohammed Bahoura:
  Voice singer detection in polyphonic music. 884-887
  
• Pierre-Emmanuel Gaillardon, Fabien Clermidy, Ian O'Connor, Junchen Liu, Renaud Daviot:
  Mapping method of reconfigurable cell matrices based on nanoscale devices using inter-stage fixed interconnection scheme. 888-891
  
• Mohamed Amir Abdi, Fayçal Djeffal, Mohammed Meguellati, Djemai Arar:
  Two-dimensional analytical threshold voltage model for nanoscale graded channel gate stack DG MOSFETs. 892-895
  
• Gianluca Gatto, Ignazio Marongiu, Alessandro Serpi, Aldo Perfetto:
  Predictive control of standalone brushless DC generators. 896-899
  
• Muhammad Khurram Bhatti, Cécile Belleudy, Michel Auguin:
  A framework for offline optimization of energy consumption in real time multiprocessor system-on-chip. 900-903
  
• Karim Jaber, Brahim Ben Saleh, Ahmed Fakhfakh, Rafik Neji:
  Modeling and simulation of electrical vehicle in VHDL-AMS. 908-911
  
• Walid Hassairi, Moncef Bousselmi, Mohamed Abid, Carlos Valderrama Sakuyama:
  Using matlab and Simulink in SystemC verification environment By JPEG algorithm. 912-915
  
• Jesús M. Pérez, Pablo Sánchez, Marcos Martinez:
  Low-cost Bayer to RGB bilinear interpolation with hardware-aware median filter. 916-919
  
• Jaroslav Kadlec, Radek Kuchta, Radimir Vrba:
  Comparison of the WLAN's security functions time consumption. 920-923
  
• Fathi Teyeb, Inès Kammoun:
  Turbo channel estimation for an orthgonal space-time coded system on fast time-varying channels. 924-927
  
• Philippe Martin-Gonthier, Pierre Magnan:
  RTS noise impact in CMOS image sensors readout circuit. 928-931
  
• Mohammad Reza Nabavi, Stoyan Nihtianov:
  Stability considerations in a new interface circuit for inductive position sensors. 932-935
  
• Stefano D'Amico, Marcello De Matteis, Franco Grancagnolo, Marco Panareo, Roberto Perrino, Gabriele Chiodini, Alessandro Corvaglia, Giuseppe Cocciolo, Andrea Baschirotto:
  A 0.13µm CMOS VGA for drift chambers. 936-939
  
• Leonardo Barboni, Maurizio Valle:
  Signal-to-noise ratio evaluation for embedded wireless sensor nodes: A novel methodology. 940-943
  
• Alberto Yufera, Adoración Rueda:
  Design of A CMOS closed-loop system useful for bio-impedance measurements. 948-951
  
• Marco Carminati, Giorgio Ferrari, Filippo Guagliardo, Marco Farina, Marco Sampietro:
  Low-noise single-chip potentiostat for nano-bio-electrochemistry over a 1MHz bandwidth. 952-955
  
• John R. Long, Yi Zhao, Wei L. Chan, Ka Chun Kwok, Yanyu Jin, Dixian Zhao:
  Silicon millimeter-wave technologies and circuits. 956-959
  
• Michael Salter, Duncan Platt, Lars Pettersson, Lars Aspemyr, Mingquan Bao:
  Circuits and system simulations for 100Gb/s optical SCM transmission. 960-963
  
• Axel Flament, Philippe Lombard, Bruno Stefanelli, Andreas Kaiser, Andreia Cathelin:
  A combined 4-bit quadrature digital to analog converter/mixer for millimeter-wave applications. 964-967
  
• Thierry Taris, Yann Deval, Raffaele Roberto Severino, Chama Ameziane, Didier Belot, Jean-Baptiste Begueret:
  Millimeter-Waves building block design methodology in BiCMOS technology. 968-971
  
• Yi Zhao, Yanyu Jin, Marco Spirito, John R. Long:
  Millimeter-wave passive components on silicon for wireless communication applications. 972-975
  
• Mohsin Amin, Fabrice Monteiro, Camille Diou, Abbas Ramazani, Abbas Dandache:
  A HW/SW mixed mechanism to improve the dependability of a stack processor. 976-979
  
• Dimitrios Schinianakis, Athanasios Kakarountas, Thanos Stouraitis, Alexander Skavantzos:
  Elliptic Curve Point Multiplication in GF(2ⁿ) using Polynomial Residue Arithmetic. 980-983
  
• Eduardo Luis Rhod, Luca Sterpone, Luigi Carro:
  A new RC design for mixed-grain based dynamically reconfigurable architectures. 984-987
  
• Guangye Tian, Omar Hammami:
  Performance measurements of synchronization mechanisms on 16PE NOC based multi-core with dedicated synchronization and data NOC. 988-991
  
• Mohamed Dessouky:
  Analog design migration: An overview. 992-995
  
• Ammar Nassaj, Jens Lienig, Goeran Jerke:
  A new methodology for constraint-driven layout design of analog circuits. 996-999
  
• Vagner S. Rosa, Fabio F. Daitx, Eduardo Costa, Sergio Bampi:
  Design flow for the generation of optimized FIR filters. 1000-1003
  
• Mahmoud Bellili, Larbi Ben Hadj Slama, Mohamed Siala:
  Multi-pulse/single-pulse design for maximizing SIR in partially equalized OFDM systems over highly dispersive channels. 1004-1007
  
• Leïla Najjar Atallah, Mohamed Siala:
  A new scheme for preamble detection and frequency acquisition in OFDM systems. 1008-1011
  
• Naoufel Debbabi, Sami Chtourou, Inès Kammoun, Mohamed Siala:
  Amplify and forward relaying optimization for uplink CDMA communications subject to constant multiple access interference cost. 1012-1015
  
• Imed Hadj-Kacem, Noura Sellami, Lotfi Kamoun:
  Optimal training sequence length for soft iterative channel estimation. 1016-1019
  
• Tamás Krébesz, Géza Kolumbán, Francis C. M. Lau, Chi Kong Tse:
  Performance improvement of UWB autocorrelation receivers by minimizing the energy capture time. 1020-1023
  

Last update Fri May 25 08:18:36 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page