ICCD 2004:
San Jose, CA, USASession 1
Session 1.1 High-Speed and Energy-Efficient Circuit Design
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Session 1.2 Energy-Efficient Processor Microarchitecture (1)
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Yu Bai ,
R. Iris Bahar :
Reducing Issue Queue Power for Multimedia Applications using a Feedback Control Algorithm.
54-57
Session 1.3 Scan Design and Test
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Session 2
Session 2.1 Routing and Floorplanning
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Martin D. F. Wong :
Reticle Floorplanning with Guaranteed Yield for Multi-Project Wafers.
106-110
Session 2.2 Formal Verification Embedded Tutorial
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Miroslav N. Velev :
Comparative Study of Strategies for Formal Verification of High-Level Processors.
119-124
Session 2.3 Signal Integrity and Leakage
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Session 3
Session 3.1 Special Session on High-Performance On-Chip Communication.
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Session 3.2 Test Generation and Characterization
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Session 3.3 Physically-Aware Design Tools
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Session 4
Session 4.1 Energy-Efficient Processor Microarchitecture (2)
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Session 4.2 Power and Timing Optimization
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Feng Gao ,
John P. Hayes :
Gate Sizing and V{t} Assignment for Active-Mode Leakage Power Reduction.
258-264
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Session 4.3 Novel Processor Design
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Session 5
Session 5.1 Emerging Technologies Special Session
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Session 5.2 Cache Memory Design
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Session 6
Session 6.1 Layout-Driven Circuit Optimization
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Session 6.2 Instruction-Level Parallelism (1)
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Session 6.3 Power Estimation and Minimization
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Donald Chai ,
Andreas Kuehlmann :
Circuit-Based Preprocessing of ILP and Its Applications in Leakage Minimization and Power Estimation.
387-392
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Session 7
Session 7.1 Formal Verification Techniques
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Session 7.2 Networks on Chips
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Session 7.3 Novel Processor Architecture
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Session 8
Session 8.1 Instruction-Level Parallelism (2)
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Session 8.2 Topics in Synthesis and Co-Simulation
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Jinwen Xi ,
Peixin Zhong :
Hardware/Software Co-Modeling of SAT Solver Based on Distributed Computing Elements using SystemC.
502-504
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Session 8.3 Low-Power Architecture
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Session 9
Session 9.1 Test Generation
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Session 9.2 Network Routing
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Session 9.3 Placement and Floorplanning
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Hai Zhou ,
Jia Wang :
ACG-Adjacent Constraint Graph for General Floorplans.
572-575
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