ICCD 1996: Austin, Texas, USA

Verification

Design for Test

Opportunities and Pitfalls in HDL-Based System Design

Issues on the Architecture and the Design of Distributed Shared Memory Systems

Novel Aspects of Scheduling

Multimedia Systems

System Design Aspect

Processor Design Verification

Design and Test Plenary

Data Communication

Design Automation for Embedded Systems

Branch Predictio

Automatic Test Pattern Generation

VLSI Layou

Embedded Systems Tutorial

VLSI Technology and Design

Special Session

Architecture Plenar

Minimization Techniques

Future Asynchronous Designs

Sequential Synthesis

Integration Support

Performance Analysis and Validation

VLSI Signal Processors

Architectural Issues in High Level Synthesis

Arithmetic Circuits

Synthesis for FPGAs

maintained by Schloss Dagstuhl LZI at University of Trier