1. ICNC 2010: Hiroshima, Japan

Algorithms

• Marcos Slomp, Toru Tamaki, Kazufumi Kaneda:
  Screen-Space Ambient Occlusion through Summed-Area Tables. 1-8
  
• Yamin Li, Shietung Peng, Wanming Chu:
  Node-to-Set Disjoint-Paths Routing in Recursive Dual-Net. 9-14
  
• Akio Kawabata, Tetsushi Koide, Hans Jürgen Mattausch:
  Optimization Vector Quantization by Adaptive Associative-Memory-Based Codebook Learning in Combination with Huffman Coding. 15-19
  

Peer-to-Peer

• Ervianto Abdullah, Satoshi Fujita:
  A Quick Detection of Colluders in P2P CDNs to Avoid an Illegal Leak of the Contents. 20-27
  
• Ryusuke Uedera, Satoshi Fujita:
  Adaptive Prefetching Scheme for Peer-to-Peer Video-on-Demand Systems with a Media Server. 28-35
  
• Takuya Nishikawa, Satoshi Fujita:
  An Effective Risk Avoidance Scheme for the EigenTrust Reputation Management System. 36-43
  

Networking

• Jing Cai, Zhibin Zhang, Peng Zhang, Xinbo Song:
  An Adaptive Timeout Strategy for Profiling UDP Flows. 44-48
  
• Yu-Chun Cheng, Eric Hsiao-Kuang Wu, Gen-Huey Chen:
  A New Wireless TCP Issue in Cognitive Radio Networks. 49-54
  
• Yusuke Shomura, Kenichi Yoshida, Akira Sato, Satoshi Matsumoto, Kozo Itano:
  A Traffic Analysis Using Cardinalities and Header Information. 55-62
  

Computer Architecture

• Tomoki Ikegaya, Tomoaki Tsumura, Hiroshi Matsuo, Yasuhiko Nakashima:
  A Speed-Up Technique for an Auto-Memoization Processor by Collectively Reusing Continuous Iterations. 63-70
  
• Takefumi Miyoshi, Kenji Kise, Hidetsugu Irie, Tsutomu Yoshinaga:
  CODIE: Continuation-Based Overlapping Data-Transfers with Instruction Execution. 71-77
  
• Kanemitsu Ootsu, Takeshi Abe, Takashi Yokota, Takanobu Baba:
  Loop Performance Improvement for Min-cut Program Decomposition Method. 78-87
  

Computer Systems

• Son Truong Nguyen, Shigeru Oyanagi:
  The Design of On-the-Fly Virtual Channel Allocation for Low Cost High Performance On-Chip Routers. 88-94
  
• Hiroki Asai, Tomoaki Tsumura, Hiroshi Matsuo:
  Proposition of Criteria for Aborting Transaction Based on Log Data Size in LogTM. 95-103
  
• Marcos F. Caetano, Jacir Luiz Bordim:
  A Cluster Based Collaborative Cache Approach for MANETs. 104-111
  

Performance-Oriented Systems

• Hisanobu Tomari, Mary Inaba, Kei Hiraki:
  Compressing Floating-Point Number Stream for Numerical Applications. 112-119
  
• Duhu Man, Kenji Uda, Hironobu Ueyama, Yasuaki Ito, Koji Nakano:
  Implementations of Parallel Computation of Euclidean Distance Map in Multicore Processors and GPUs. 120-127
  
• Tetsushi Koide, R. Kimura, T. Sugahara, K. Okazaki, Hans Jürgen Mattausch:
  Architecture and FPGA-Implementation of Scalable Picture Segmentation by 2D Scanning with Flexible Pixel-Block Size. 128-132
  

Hardware Design and Implementation

• Shinya Takamaeda, Shimpei Sato, Takefumi Miyoshi, Kenji Kise:
  Smart Core System for Dependable Many-Core Processor with Multifunction Routers. 133-139
  
• Bo Song, Kensuke Kawakami, Koji Nakano, Yasuaki Ito:
  An RSA Encryption Hardware Algorithm Using a Single DSP Block and a Single Block RAM on the FPGA. 140-147
  
• Md. Nazrul Islam Mondal, Koji Nakano, Yasuaki Ito:
  A Rewriting Algorithm to Generate AROM-free Fully Synchronous Circuits. 148-155
  

Second Workshop on Ultra Performance and Dependable Acceleration Systems (UPDAS)

• Cisse Ahmadou Dit Adi, Hiroki Matsutani, Michihiro Koibuchi, Hidetsugu Irie, Takefumi Miyoshi, Tsutomu Yoshinaga:
  An Efficient Path Setup for a Photonic Network-on-Chip. 156-161
  
• Jing Lin, Xiaola Lin:
  Express Circuit Switching: Improving the Performance of Bufferless Networks-on-Chip. 162-166
  
• M. M. Hafizur Rahman, Yukinori Sato, Yasushi Inoguchi:
  Dynamic Communication Performance of a Modified Hierarchical 3D-Torus Network under Non-uniform Traffic Patterns. 167-172
  
• Shintaro Sano, Masahiro Sano, Shimpei Sato, Takefumi Miyoshi, Kenji Kise:
  Pattern-Based Systematic Task Mapping for Many-Core Processors. 173-178
  
• Toru Tamaki, Miho Abe, Bisser Raytchev, Kazufumi Kaneda:
  Softassign and EM-ICP on GPU. 179-183
  
• Pulung Waskito, Shinobu Miwa, Yasue Mitsukura, Hironori Nakajo:
  Parallelizing Hilbert-Huang Transform on a GPU. 184-190
  

Second International Workshop on Parallel and Distributed Algorithms and Applications (PDAA)

• Wadoud Bousdira, Frédéric Gava, Louis Gesbert, Frédéric Loulergue, Guillaume Petiot:
  Functional Parallel Programming with Revised Bulk Synchronous Parallel ML. 191-196
  
• Jacir Luiz Bordim, Alex V. Barbosa, Marcos F. Caetano, Priscila Solís Barreto:
  IEEE802.11b/g Standard: Theoretical Maximum Throughput. 197-201
  
• Ernesto Gomez, Keith E. Schubert:
  Algebra of Synchronization with Application to Deadlock and Semaphores. 202-208
  
• Keisuke Iwai, Takakazu Kurokawa, Naoki Nishikawa:
  AES Encryption Implementation on CUDA GPU and Its Analysis. 209-214
  
• Jun-ichi Muramatsu, Shao-Liang Zhang, Yusaku Yamamoto:
  Acceleration of Hessenberg Reduction for Nonsymmetric Eigenvalue Problems Using GPU. 215-219
  
• Kosuke Nishihara, Kazuhisa Ishizaka, Junji Sakai:
  Power Saving in Mobile Devices Using Context-Aware Resource Control. 220-226
  
• Tadachika Oki, Satoshi Taoka, Toshimasa Watanabe:
  A Parallel Algorithm for 2-Edge-Connectivity Augmentation of a Connected Graph with Multipartition Constraints. 227-231
  
• Christian Schäck, Wolfgang Heenes, Rolf Hoffmann:
  Multiprocessor Architectures Specialized for Multi-agent Simulation. 232-236
  
• Cheng-Jen Tang, Miau Ru Dai:
  An Evaluation on Sensor Network Technologies for AMI Associated Mudslide Warning System. 237-242
  
• Qin Wang, Junichi Ohmura, Shan Axida, Takefumi Miyoshi, Hidetsugu Irie, Tsutomu Yoshinaga:
  Parallel Matrix-Matrix Multiplication Based on HPL with a GPU-Accelerated PC Cluster. 243-248
  
• Shinichi Yamagiwa, Masahiro Arai, Koichi Wada:
  Design and Implementation of a Uniform Platform to Support Multigenerational GPU Architectures for High Performance Stream-Based Computing. 249-255
  
• Martin Jurecko, Jana Kocisová, Ján Busa Jr., Tomás Kasanický, Marek Domiter, Marián Zvada:
  Evaluation Framework for GPU Performance Based on OpenCL Standard. 256-261
  

International Workshop on Advances in Networking and Computing (WANC)

• Ryo Aoki, Shuichi Oikawa, Ryoji Tsuchiyama, Takashi Nakamura:
  Improving Hybrid OpenCL Performance by High Speed Networks. 262-263
  
• Lin Meng, Shigeru Oyanagi:
  Control Independence Using Dual Renaming. 264-267
  
• Fuminori Makikawa, Tatsuhiro Tsuchiya, Tohru Kikuno:
  Balance and Proximity-Aware Skip Graph Construction. 268-271
  
• Kazuya Matsumoto, Stanislav G. Sedukhin:
  Matrix Multiply-Add in Min-plus Algebra on a Short-Vector SIMD Processor of Cell/B.E.. 272-274
  
• Michihiro Mikamo, Marcos Slomp, Shungo Yanase, Bisser Raytchev, Toru Tamaki, Kazufumi Kaneda:
  Maximizing Image Utilization in Photomosaics. 275-278
  
• Kohei Ogawa, Yasuaki Ito, Koji Nakano:
  Efficient Canny Edge Detection Using a GPU. 279-280
  
• Abhijeet A. Ravankar, Stanislav G. Sedukhin:
  Mesh-of-Tori: A Novel Interconnection Network for Frontal Plane Cellular Processors. 281-284
  
• Yoshio Sakurauchi, Rick McGeer, Hideyuki Takada:
  Open Web: Seamless Proxy Interconnection at the Switching Layer. 285-289
  
• Akihiro Suzuki, Shuichi Oikawa:
  Implementation of SIVARM: A Simple VMM for the ARM Architecture. 290-291
  
• Jun Yamasaki, Yasushi Kambayashi:
  Design an Implementation of Bee Hive in a Mult-agent Based Resource Discovery Method in P2P Systems. 292-293
  
• Yi Yin, Xiaodong Xu, Yoshiaki Katayama, Naohisa Takahashi:
  Inconsistency Detection System for Security Policy and Firewall Policy. 294-297
  
• Daichi Yokota, Satoshi Fujita:
  Article Recommender for Feed Readers with a Loss Compensation Based on the TF-IDF Weight. 298-299
  

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