Proceedings of the 11th IEEE International Conference on High Performance Switching and Routing, HPSR 2010, 13-16 June 2010, Richardson, Texas, USA.
11. HPSR 2010:
Richardson, Texas, USA
Router and Switch Architectures
Buffer Design and Analysis
, Bill Lin
: Block-based packet buffer with deterministic packet departures.
: A novel hybrid memory architecture with parallel DRAM for fast packet buffers.
Signaling, Testing, Monitoring and Control
Fault-Tolerance and Survivability