Multithreading

• 
  J. Gregory Steffan, Todd C. Mowry: The Potential for Using Thread-Level Data Speculation to Facilitate Automatic Parallelization. 2-13
• 
  Jordi Tubella, Antonio González: Control Speculation in Multithreaded Processors through Dynamic Loop Detection. 14-23
• 
  Jenn-Yuan Tsai, Zhenzhen Jiang, Eric Ness, Pen-Chung Yew: Performance Study of a Concurrent Multithreaded Processor. 24-35

Routing and Communication Mechanisms

• 
  Frederic T. Chong, Rajeev Barua, Fredrik Dahlgren, John Kubiatowicz, Anant Agarwal: The Sensitivity of Communication Mechanisms to Bandwidth and Latency. 37-46
• 
  Manolis Katevenis, Dimitrios N. Serpanos, Emmanuel Spyridakis: Credit-Flow-Controlled ATM for MP Interconnection: The ATLAS I Single-Chip ATM Switch. 47-56
• 
  Pedro López, Juan Miguel Martínez, José Duato: A Very Efficient Distributed Deadlock Detection Mechanism for Wormhole Networks. 57-66

Communication Impact on Application Performance

• 
  Koen Langendoen, Rutger F. H. Hofman, Henri E. Bal: Challenging Applications on Fast Networks. 68-79
• 
  David R. O'Hallaron, Jonathan Richard Shewchuk, Thomas R. Gross: Architectural Implications of a Family of Irregular Applications. 80-89
• 
  Remzi H. Arpaci-Dusseau, Andrea C. Arpaci-Dusseau, David E. Culler, Joseph M. Hellerstein, David A. Patterson: The Architectural Costs of Streaming I/O: A Comparison of Workstations, Clusters, and SMPs. 90-101

SMP Clusters

• 
  Adrian Moga, Michel Dubois: The Effectiveness of SRAM Network Caches in Clustered DSMs. 103-112
• 
  Rudrajit Samanta, Angelos Bilas, Liviu Iftode, Jaswinder Pal Singh: Home-Based SVM Protocols for SMP Clusters: Design and Performance. 113-124
• 
  Daniel J. Scales, Kourosh Gharachorloo, Anshu Aggarwal: Fine-Grain Software Distributed Shared Memory on SMP Clusters. 125-136

Shared-Memory Multiprocessors

• 
  Kattamuri Ekanadham, Beng-Hong Lim, Pratap Pattnaik, Marc Snir: PRISM: An Integrated Architecture for Scalable Shared Memory. 140-151
• 
  Sujoy Basu, Josep Torrellas: Enhancing Memory Use in Simple Coma: Multiplexed Simple Coma. 152-161
• 
  Ye Zhang, Lawrence Rauchwerger, Josep Torrellas: Hardware for Speculative Run-Time Parallelization in Distributed Shared-Memory Multiprocessors. 162-173

Speculation and Register Renaming

• 
  Antonio González, José González, Mateo Valero: Virtual-Physical Registers. 175-184
• 
  Tien-Fu Chen: Supporting Highly-Speculative Execution via Adaptive Branch Trees. 185-194
• 
  Sridhar Gopal, T. N. Vijaykumar, James E. Smith, Gurindar S. Sohi: Speculative Versioning Cache. 195-205

Network Interface Design

• 
  Shubhendu S. Mukherjee, Mark D. Hill: The Impact of Data Transfer and Buffering Alternatives on Network Interface Design. 207-218
• 
  Ioannis Schoinas, Mark D. Hill: Address Translation Mechanisms In Network Interfaces. 219-230
• 
  Kenneth Mackenzie, John Kubiatowicz, Matthew Frank, Walter Lee, Victor Lee, Anant Agarwal, M. Frans Kaashoek: Exploiting Two-Case Delivery for Fast Protected Messaging. 231-242

Compiler and Operating System Issues

• 
  John Kalamatianos, David R. Kaeli: Temporal-Based Procedure Reordering for Improved Instruction Cache Performance. 244-253
• 
  Marta Jiménez, José M. Llabería, Agustin Fernández: Performance Evaluation of Tiling for the Register Level. 254-265
• 
  William A. Havanki, Sanjeev Banerjia, Thomas M. Conte: Treegion Scheduling for Wide Issue Processors. 266-276
• 
  Kaushik Ghosh, Allan J. Christie: Communication Across Fault-Containment Firewalls on the SGI Origin. 277-287

Enhancements for DSM Systems

• 
  Luiz Rodolpho Monnerat, Ricardo Bianchini: Efficiently Adapting to Sharing Patterns in Software DSMs. 289-299
• 
  Todd C. Mowy, Charles Q. C. Chan, Adley K. W. Lo: Comparative Evaluation of Latency Tolerance Techniques for Software Distributed Shared Memory. 300-311
• 
  Evan Speight, John K. Bennett: Using Multicast and Multithreading to Reduce Communication in Software DSM Systems. 312-322

Processor Design and Performance Evaluation

• 
  David Abramson, Paul Logothetis, Adam Postula, Marcus Randall: FPGA Based Custom Computing Machines for Irregular Problems. 324-333
• 
  Michael F. Miller, Kenneth J. Janik, Shih-Lien Lu: Non-Stalling CounterFlow Architecture. 334-341
• 
  Darren Erik Vengroff, Guang R. Gao: Partial Sampling with Reverse State Reconstruction: A New Technique for Branch Predictor Performance Estimation. 342-351

last updated on Thu May 23 03:20:11 2013 by the dblp team
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