15. ACM Great Lakes Symposium on VLSI 2005: Chicago, Illinois, USA

Plenary session

Interconnect

Computer architecture

Poster session 1

Testing

Nano and Emerging Technologies

High-level low power design I

Verification

High-level low power design II

Computer-aided design (CAD)

Poster session 2

VLSI circuit design

Routing

Circuit-level low power design

Placement