3. FMCAD 2000:
Austin, Texas, USA
Warren A. Hunt Jr.
, Steven D. Johnson
: Formal Methods in Computer-Aided Design, Third International Conference, FMCAD 2000, Austin, Texas, USA, November 1-3, 2000, Proceedings. Lecture Notes in Computer Science
1954, Springer 2000
, ISBN 3-540-41219-0
David M. Russinoff
: A Case Study in Fomal Verification of Register-Transfer Logic with ACL2: The Floating Point Adder of the AMD AthlonTM Processor. 3-36
: Formal Verification of Floating Point Trigonometric Functions. 217-233
Gordon J. Pace
: The Semantics of Verilog Using Transition System Combinators. 405-422
: Sequential Equivalence Checking by Symbolic Simulation. 423-442
The following paper was mistakenly left out of the printed proceedings. It is available in the online version only.