3. FMCAD 2000: Austin, Texas, USA

@proceedings{DBLP:conf/fmcad/2000,
  editor    = {Warren A. Hunt Jr. and
               Steven D. Johnson},
  title     = {Formal Methods in Computer-Aided Design, Third International
               Conference, FMCAD 2000, Austin, Texas, USA, November 1-3, 2000,
               Proceedings},
  booktitle = {FMCAD},
  publisher = {Springer},
  series    = {Lecture Notes in Computer Science},
  volume    = {1954},
  year      = {2000},
  isbn      = {3-540-41219-0},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

Invited Talk

• Mark E. Dean:
  Trends in Computing. 1-2
  

Invited Paper

• David M. Russinoff:
  A Case Study in Fomal Verification of Register-Transfer Logic with ACL2: The Floating Point Adder of the AMD Athlon^TM Processor. 3-36
  

Contributed Papers

• Roderick Bloem, Harold N. Gabow, Fabio Somenzi:
  An Algorithm for Strongly Connected Component Analysis in n log n Symbolic Steps. 37-54
  
• Rajeev Alur, Radu Grosu, Bow-Yaw Wang:
  Automated Refinement Checking for Asynchronous Processes. 55-72
  
• In-Ho Moon, Gary D. Hachtel, Fabio Somenzi:
  Border-Block Triangular Form and Conjunction Schedule in Image Computation. 73-90
  
• David A. Basin, Stefan Friedrich, Sebastian Mödersheim:
  B2M: A Semantic Based Tool for BLIF Hardware Descriptions. 91-107
  
• Mary Sheeran, Satnam Singh, Gunnar Stålmarck:
  Checking Safety Properties Using Induction and a SAT-Solver. 108-125
  
• Nancy A. Day, Mark Aagaard, Byron Cook:
  Combining Stream-Based and State-Based Verification Techniques. 126-142
  
• Kavita Ravi, Roderick Bloem, Fabio Somenzi:
  A Comparative Study of Symbolic Algorithms for the Computation of Fair Cycles. 143-160
  
• Panagiotis Manolios:
  Correctness of Pipelined Machines. 161-178
  
• Wolfgang Reif, Jürgen Ruf, Gerhard Schellhorn, Tobias Vollmer:
  Do You Trust Your Model Checker? 179-196
  
• Edmund M. Clarke, Steven M. German, Yuan Lu, Helmut Veith, Dong Wang:
  Executable Protocol Specification in ESL. 197-216
  
• John Harrison:
  Formal Verification of Floating Point Trigonometric Functions. 217-233
  
• Jun Sawada, Warren A. Hunt Jr.:
  Hardware Modeling Using Function Encapsulation. 234-245
  
• Antonio Cerone, George J. Milne:
  A Methodology for the Formal Analysis of Asynchronous Micropipelines. 246-262
  
• Mark Aagaard, Robert B. Jones, Thomas F. Melham, John W. O'Leary, Carl-Johan H. Seger:
  A Methodology for Large-Scale Hardware Verification. 263-282
  
• Nina Amla, E. Allen Emerson, Robert P. Kurshan, Kedar S. Namjoshi:
  Model Checking Synchronous Timing Diagrams. 283-298
  
• Jin Hou, Eduard Cerny:
  Model Reductions and a Case Study. 299-315
  
• Adilson Luiz Bonifácio, Arnaldo Vieira Moura:
  Modeling and Parameters Synthesis for an Air Traffic Management System. 316-334
  
• Kanna Shimizu, David L. Dill, Alan J. Hu:
  Monitor-Based Formal Specification of PCI. 335-353
  
• Aarti Gupta, Zijiang Yang, Pranav Ashar, Anubhav Gupta:
  SAT-Based Image Computation with Application in Reachability Analysis. 354-371
  
• Per Bjesse, Koen Claessen:
  SAT-Based Verification without State Space Traversal. 372-389
  
• Shoham Ben-David, Tamir Heyman, Orna Grumberg, Assaf Schuster:
  Scalable Distributed On-the-Fly Symbolic Model Checking. 390-404
  
• Gordon J. Pace:
  The Semantics of Verilog Using Transition System Combinators. 405-422
  
• Gerd Ritter:
  Sequential Equivalence Checking by Symbolic Simulation. 423-442
  
• Christoph Meinel, Christian Stangier:
  Speeding Up Image Computation by Using RTL Information. 443-454
  
• Kiyoharu Hamaguchi, Hidekazu Urushihara, Toshinobu Kashiwabara:
  Symbolic Checking of Signal-Transition Consistency for Verifying High-Level Designs. 455-469
  
• Chris Wilson, David L. Dill, Randal E. Bryant:
  Symbolic Simulation with Approximate Values. 470-485
  
• Randal E. Bryant, Pankaj Chauhan, Edmund M. Clarke, Amit Goel:
  A Theory of Consistency for Modular Synchronous Systems. 486-504
  
• Michael D. Jones, Ganesh Gopalakrishnan:
  Verifying Transaction Ordering Properties in Unbounded Bus Networks through Combined Deductive/Algorithmic Methods. 505-519
  
• Alex Tsow, Steven D. Johnson:
  Visualizing System Factorizations with Behavior Tables. 520-537
  

Addendum

• Robert Beers, Rajnish Ghughal, Mark Aagaard:
  Applications of Hierarchical Verification in Model Checking.
  

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