6. FDL 2003:
Frankfurt, Germany AMS-1:
IP and Reuse
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conf/fdl/MieyevilleBOGJ03 export record as
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AMS-2:
System Level Desing
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C. Isaia ,
Tom J. Kazmierski :
SystemC - a powerful system-level modelling platform for digital and mixed-signal hardware/software co-design.
45-54
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AMS-3:
Modelling Technigues
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Yannick Hervé :
Simple Models for Complex Systems : A-FSM Template.
90-98
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J. Haase :
Rules for Analog and Mixed-Signal VHDL-AMS Modeling.
98-108
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AMS-4:
Sigma/Delta Converters
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conf/fdl/Castro-LopezRRRHF03 export record as
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AMS-5:
Desing Methodologies
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conf/fdl/Tissafi-DrissiOMG03 export record as
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AMS-6:
Praktical Applications
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UML-1:
UML for HW/SW Codesign
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UML-2:
Transformations and Code Generation
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UML-3:
Model Driven Architekture
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UML-4:
Real Time and System Level Modelling
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Grzegorz Labiak :
From UML statecharts to FPGA - the HiCoS approach.
354-364
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LFM-1:
Property Specification and Analysis
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Y. Zhao :
Intuitive Representations for Temporal Logic Formulas.
405-414
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LFM-2:
Formal Specification in Application
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LFM-3:
System Desing under Formal Aspects
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Dominique Borrione ,
Menouer Boubekeur :
Modeling CHP descriptions in Labeled Transitions Systems for an efficient formal validation of asynchronous circuit specifications.
481-492
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conf/fdl/Ayala-RinconJLH03
LFM-4:
Formal Refinement
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J. Fogel :
Compositional Proof Rules for Hierarchical Timed Automata.
536-547
CSD-1:
System Specification
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Chris Sullivan ,
Jeff Jussel :
Software-Compiled System Desing: a methodology based approach to the specification & desing of Programmable SoC.
557-565
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CSD-2:
Languages in Media + Projects
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CSD-3:
High Level Verification and Test Generation
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Avi Ziv :
Functional Verification Environment for Object-oriented Hardware Designs.
637-646
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CSD-4:
Desing for Verification No papers
CSD-5:
System Desing
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conf/fdl/ChevalierRBBAB03 export record as
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Ole Blaurock :
C-model integration and software development using system-level simulation at TLM in a SystemC-based desing flow.
716-719
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