EWDTS 2008: Lviv, Ukraine

2008 East-West Design & Test Symposium, EWDTS 2008, Lviv, Ukraine, October 9-12, 2008. IEEE 2008, ISBN 978-1-4244-3402-2

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  - conf/ewdts/FummiGMP08
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Franco Fummi, Valerio Guarnieri, Cristina Marconcini, Graziano Pravadelli: An optimized CLP-based technique for generating propagation sequences. 25-29
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  - conf/ewdts/EnglishMPS08
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Tom English, Ka Lok Man, Emanuel M. Popovici, Michel P. Schellekens: HotSpot: Visualizing dynamic power consumption in RTL designs. 45-48
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  - conf/ewdts/WielgusP08
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Andrzej Wielgus, Witold A. Pleskacz: Characterization of CMOS sequential standard cells for defect based voltage testing. 49-54
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  - conf/ewdts/ZielskiS08
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Slawomir Zielski, Janusz Sosnowski: Testing the control part of peripheral interfaces. 55-58
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  - conf/ewdts/LabiakA08
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Grzegorz Labiak, Marian Adamski: Concurrent processes synchronisation in statecharts for FPGA implementation. 59-64
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  - conf/ewdts/Kamkin08
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Alexander Kamkin: Coverage-directed verification of microprocessor units based on cycle-accurate contract specifications. 84-87
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  - conf/ewdts/Lazorenko08
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Dmytro Lazorenko: Multidimensional loop fusion for low-power. 92-95
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  - conf/ewdts/HatamiN08
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Nadereh Hatami, Zainalabedin Navabi: An advanced method for synthesizing TLM2-based interfaces. 104-108
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  - conf/ewdts/AyupovK08
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Andrey Ayupov, Leonid Kraginskiy: A novel timing-driven placement algorithm using smooth timing analysis. 137-140
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  - conf/ewdts/MelikyanHIH08
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Vazgen Melikyan, Aristakes Hovsepyan, Mkrtich Ishkhanyan, Tigran Hakobyan: Digital lock detector for PLL. 141-142
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  - conf/ewdts/HahanovLKG08
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Vladimir Hahanov, Eugenia Litvinova, Karina Krasnoyaruzhskaya, Sergey Galagan: Diagnosis of SoC faulty memory cells for embedded repair. 143-148
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  - conf/ewdts/ChumachenkoGHS08
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Svetlana Chumachenko, Wajeb Gharibi, Anna Hahanova, Aleksey Sushanov: SoC software components diagnosis technology. 155-158
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Vladimir Hahanov, Olesya Guz, Natalya Kulbakova, Maxim Davydov: Vector-logical diagnosis method for SOC functionalities. 159-162
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  - conf/ewdts/KaminskaPKM08
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Maryna Kaminska, Roman Prikhodchenko, Artem Kubirya, Pavel Mocar: Testability analysis method for hardware and software based on assertion libraries. 163-167
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  - conf/ewdts/RefanPN08
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Fatemeh Refan, Paolo Prinetto, Zainalabedin Navabi: An IEEE 1500 compatible wrapper architecture for testing cores at transaction level. 178-181
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  - conf/ewdts/MahaniMN08
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Negin Mahani, Parnian Mokri, Zainalabedin Navabi: System level hardware design and simulation with SystemAda. 190-193
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  - conf/ewdts/MalekshahiSN08
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Somayeh Malekshahi, Mahshid Sedghi, Zainalabedin Navabi: Automating Hardware/Software partitioning using dependency Graph. 196-199
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  - conf/ewdts/AlaghiSKFN08
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Armin Alaghi, Mahshid Sedghi, Naghmeh Karimi, Mahmood Fathy, Zainalabedin Navabi: Reliable NoC architecture utilizing a robust rerouting algorithm. 200-203
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  - conf/ewdts/DrozdARM08
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Alexander Drozd, Svetlana Antoshchuk, Andrzej Rucinski, A. Martinuk: Parity prediction method for on-line testing of a Barrel-shifter. 208-215
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  - conf/ewdts/BombieriFP08
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Nicola Bombieri, Franco Fummi, Graziano Pravadelli: RTL-TLM equivalence checking based on simulation. 214-217
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  - conf/ewdts/BorodayPU08
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Sergiy Boroday, Alexandre Petrenko, Andreas Ulrich: Test suite consistency verification. 235-239
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  - conf/ewdts/FarajipourHN08
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Najmeh Farajipour, S. Behdad Hosseini, Zainalabedin Navabi: Utilizing HDL simulation engines for accelerating design and test processes. 371-375
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  - conf/ewdts/KazemifardEATN08
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Nasim Kazemifard, Maryam Ebrahimpour, Mostafa Rahimi Azghadi, Mohammad A. Tehrani, Keivan Navi: Performance evaluation of In-Circuit Testing on QCA based circuits. 375-378
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  - conf/ewdts/GargASSK08
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Bikram Garg, Ashish Agrawal, Rajeev Sehgal, Amarpal Singh, Manish Khanna: Partitioning, floor planning, detailed placement and routing techniques for schematic generation of analog netlist. 379-382
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  - conf/ewdts/Karatkevich08
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Andrei Karatkevich: On macroplaces in Petri nets. 418-422