24. EUROMICRO 1998: Vesteras, Sweden

@proceedings{DBLP:conf/euromicro/1998,
  title     = {24th EUROMICRO '98 Conference, Engineering Systems and Software
               for the Next Decade, 25-27 August 1998, Vesteras, Sweden},
  booktitle = {EUROMICRO},
  publisher = {IEEE Computer Society},
  year      = {1998},
  isbn      = {0-8186-8646-4},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

Volume I

Combinational Logic Design

• Lech Józwiak, Niek Ederveen, Adam Postula:
  Solving Synthesis Problems with Genetic Algorithms. 10001-10007
  
• Mariusz Rawski, Tadeusz Luba, Lech Józwiak, Artur Chojnacki:
  Efficient Logic Synthesis for FPGAs with Functional Decomposition Based on Information Relationship Measure. 10008-10015
  
• Michael Burns, Marek A. Perkowski, Lech Józwiak:
  An Efficient Approach to Decomposition of Multi-Output Boolean Functions with Large Sets of Bound Variables. 10016-10023
  
• Henry Selvaraj, Muthukumar Venkatesan:
  A Reconfiguarable Printed Character Recognition System Using a Logic Synthesis Tool. 10024-
  

Poster Presentation

• Corrie Huijs:
  Design Correctness of Digital Systems. 10030-10033
  
• Christian Blumenröhr, Dirk Eisenbiegler:
  Performing High-Level Synthesis via Program Transformations within a Theorem Prover. 10034-10037
  
• Johnny Öberg, Anshul Kumar, Ahmed Hemani:
  Specification of Exception Handling in Grammar-Based Hardware Synthesis. 10038-10041
  
• A. C. Verschueren:
  Rule Base Driven Conversion of an Object Oriented Design Data Structure into Standard Hardware Description Languages. 10042-1045
  
• Mohammed El Shobaki:
  Verification of Embedded Real-Time Systems Using Hardware/Software Cosimulation. 10046-10050
  
• Denis Hommais, Frédéric Pétrot:
  Efficient Combinational Loops Handling for Cycle Precise Simulation of System on a Chip. 10051-10054
  
• Mattias O'Nils, Johnny Öberg, Axel Jantsch:
  Grammar Based Modelling and Synthesis of Device Drivers and Bus Interfaces. 10055-10058
  
• Armin Bender:
  Optimal System-Level Synthesis of Digital Systems for Real-Time Applications. 10059-10064
  
• Jesper Grode, Jan Madsen:
  A Uni.ed Component Modeling Approach for Performance Estimation in Hardware/Software Codesign. 10065-10069
  
• Joan Aranda, Joan Climent, Antoni Grau:
  A FPGA Implementation of a Video Rate Multi-Target Tracking System. 10070-
  

High-Level Synthesis

• Krzysztof Kuchcinski:
  An Approach to High-Level Synthesis Using Constraint Logic Programming. 10074-10082
  
• Flavius Gruian, Krzysztof Kuchcinski:
  Operation Binding and Scheduling for Low Power Using Constraint Logic Programming. 10083-10090
  
• George Economakos, George K. Papakonstantinou:
  Exploiting the Use of VHDL Specifications in the AGENDA High-Level Synthesis Environment. 10091-10098
  
• Katzalin Olcoz, Francisco Tirado:
  Register Allocation with Simultaneous BIST Intrusio. 10099-10106
  
• Laurence Tianruo Yang, Zebo Peng:
  An Improved Register-Transfer Level Functional Partitioning Approach for Testability. 10107-
  

Custom Computing Machines

• Adam Postula, Song Chen, Lech Józwiak, David Abramson:
  Automated Synthesis of Interleaved Memory Systems for Custom Computing Machine. 10115-10122
  
• Arrigo Benedetti, Andrea Prati, Nello Scarabottolo:
  Image Convolution on FPGAs: The Implementation of a Multi-FPGA FIFO Structure. 10123-10130
  
• Kazimierz Wiatr:
  Pipeline Architecture of Specialized Reconfigurable Processors in FPGA Structures for Real-Time Image Pre-Processing. 10131-10138
  
• Roberto R. Osorio, Montserrat Bóo, Javier D. Bruguera:
  Arithmetic Image Coding/Decoding Architecture Based on a Cache Memory. 10139-
  

System Level Design

• Frédéric Mallet, Fernand Boéri, Jean-François Duboc:
  Hardware Architecture Modelling Using an Object-Oriented Method. 10147-10153
  
• Jeroen Voeten, P. H. A. van der Putten, Marc Geilen, M. P. J. Stevens:
  System Level Modelling for Hardware/Software Systems. 10154-10161
  
• Diego C. Ruspini, Oussama Khatib, Giovanni De Micheli:
  Hardware-Softw are Run-Time Systems and Robotics: A Case Study Vincent John Mooney III. 10162-10167
  
• Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa Doboli, Paul Pop:
  Process Scheduling for Performance Estimation and Synthesis of Hardware/Software Systems. 10168-
  

Poster Presentations

• Samary Baranov:
  Minimization of Algorithmic State Machines. 10176-10179
  
• Dariusz Bojanowicz:
  How Faults can be Simulated in Self-Testable VLSI Digital Circuits. 10180-10183
  
• Janusz Sosnowski:
  Experimental Evaluation of Pseudorandom Test Effectiveness. 10184-10187
  
• Lilia Kashirova, Olga Tveretina:
  Entropy-Based Design of Low Power FSMs. 10188-10191
  
• Juan de Vicente, Juan Lanchares, Román Hermida:
  RSR: A New Rectilinear Steiner Minimum Tree Approximation for FPGA Placement and Global Routing. 10192-10195
  
• Igor Lemberski:
  Modified Approach to Automata State Encoding for LUT FPGA Implementation. 10196-10199
  
• Valery Sklyarov, Nuno Lau, Ricardo Sal Monteiro, Andreia Melo, Arnaldo Oliveira, Konstantin Kondratjuk:
  Design of Virtual Digital Controllers Based on Dynamically Reconfigurable FPGAs. 10200-10203
  
• H.-Ch. Dahmen, Uwe Gläser:
  The Impact of Area Optimization for the Power Consumption of Controllers. 10204-10207
  
• S. Aiello, Antonio Anzalone, Massimo Bartolucci, G. Cardella, S. Cavallaro, E. De Filippo, S. Femino, C. Garusi, M. Geraci, Francesco Giustolisi, Paolo Guazzoni, M. Iacono Manno, G. Lanzalone, G. Lanzano, S. Lo Nigro, Giorgio Manfredi, A. Pagano, M. Papa, S. Pirrone, G. Politi, F. Porto, F. Rizzo, S. Sambataro, G. Savino, L. Sperduto, C. Sutera, Luisa Zetta:
  Extending a Monoprocessor Real-Time System in a Multiprocessing Environment, DSP-Based. 10208-10211
  
• Oliver Chiu-sing Choy, Tin-Chak Johnson Pang, Juraj Povazanec, Cheong-fat Chan:
  A Useful Micropipeline Architecture to Implement DSP Algorithms. 10212-
  

Applications

• S. Sánchez, Daniel Meziat, M. Carbajo, J. Medina, E. Bronchalo, J. Rodríguez-Pacheco, L. del Pera:
  Control System for a Low Energy Particle Detector. 10216-10220
  
• C. John Glossner, Stamatis Vassiliadis:
  DELFT-JAVA Link Translation Buffer. 10221-
  

Real-Time Embedded Systems

• Eduard Cerny, Fen Jin:
  Verification of Real Time Controllers Against Timing Diagram Specifications Using Constraint Logic Programming. 10229-10236
  
• Youngsoo Shin, Kiyoung Choi:
  Rate Assignment for Embedded Reactive Real-Time Systems. 10237-
  
• Alexander G. Dean, John Paul Shen:
  Hardware to Software Migration with Real-Time Thread Integration. 10243-
  

Seqential Logic Synthesis

• Loc Bao Nguen, Marek A. Perkowski, Lech Józwiak:
  Design of Self-Synchronized Component FSMs for Self-Timed Systems. 10253-10260
  
• Manfred Koegst, Günter Franke, Steffen Rülke, Klaus Feske:
  Multi-Criterial State Assignment for Low Power FSM Design. 10261-10268
  
• Ning Song, Marek A. Perkowski:
  A New Approach to And/Or/Exor Factorization for Regular Array. 10269-
  

Processor and Parallel Architectures

• Sorin Cotofana, Stamatis Vassiliadis:
  On the Design Complexity of the Issue Logic of Superscalar Machines. 10277-10284
  
• Toshinori Sato:
  Data Dependence Speculation Using Data Address Prediction and its Enhancement with Instruction Reissue. 10285-10292
  
• Joan-Manuel Parcerisa, Antonio González:
  The Latency Hiding Effectiveness of Decoupled Access/Execute Processors. 10293-10300
  
• Johnny Öberg, Peeter Ellervee:
  Revolver: A High-Performance MIMD Architecture for Collision Free Computing. 10301-
  

Poster Presentations

• J. A. Maestro, Daniel Mozos, Julio Septién:
  A Grouping Partitioning Technique with Automatic Criterion Selection for the Codesign Proces. 10309-10312
  
• Apostolos A. Kountouris, Christophe Wolinski:
  Hierarchical Conditional Dependency Graphs for Conditional Resource Sharing. 10313-10316
  
• Ludovic Jacomme, Frédéric Pétrot, Rajesh K. Bawa:
  Formal Extraction of Memorizing Elements for Sequential VHDL Synthesis. 10317-10620
  
• Pedro Marcuello, Antonio González:
  Data Speculative Multithreaded Architecture. 10321-10324
  
• Daniel Tate, Gordon Steven, Paul Findlay:
  The Impact of a Realistic Cache Structure on a Statically Scheduled Architecture. 10325-10328
  
• Peter-Michael Seidel:
  How to Half the Latency of IEEE Compliant Floating-Point Multiplication. 10329-10332
  
• Julio Sahuquillo, Ana Pont:
  Impact of Reducing Miss Write Latencies in Multiprocessors with Two Level Cache. 10333-10336
  
• Fenghao Mu, Christer Svensson:
  Efficient High-Speed CMOS Design by Layout Based Schematic Method. 10337-10340
  
• Per Larsson-Edefors:
  A Miniature Serial-Data SIMD Architecture. 10341-10344
  
• Ramon Doallo, Basilio B. Fraguela, Emilio L. Zapata:
  Cache Probabilistic Modeling for Basic Sparse Algebra Kernels Involving Matrices with a Non Uniform Distribution. 10345-
  

High-Level Synthesis II

• Jonas Hallberg, Zebo Peng:
  Estimation and Consideration of Interconnection Delays during High-Level Synthesis. 10349-10356
  
• Werner Grass, Stefan Lenk, Christine Sontheim:
  Design of Control Dominated Hardware Based on Formal Methods. 10357-10364
  
• Anatoli Sergyienko, Juri Kanevski, Oleg Maslennikov, Roman Wyrzykowski:
  A Method for Mapping DSP Algorithms into Application Specific Structures. 10365-
  

Dependable Computing Systems

• Michael R. Lyu:
  Keynote Speech: Design Testing and Evaluation Techniques for Software Reliability Engineering.
  

Masking Techniques

• G. Latif-Shabgahi, Julian M. Bass, Stuart Bennett:
  Simulation of a Component-Oriented Voter Library for Dependable Control Applications. 10372-10378
  
• Vincenzo De Florio, Geert Deconinck, Rudy Lauwereins:
  The EFTOS Voting Farm: A Software Tool for Fault Masking in Message Passing Parallel Environments. 10379-10386
  
• Robert Feldt:
  Generating Multiple Diverse Software Versions with Genetic Programming. 10387-
  

Recovery Techniques

• Luís Moura Silva, João Gabriel Silva:
  An Experimental Study about Diskless Checkpointing. 10395-10402
  
• Franco Zambonelli:
  Distributed Checkpoint Algorithms to Avoid Roll-Back Propagation. 10403-10410
  
• R. Stroph, T. Clarke:
  Dynamic Acceptance Tests for Complex Controllers. 10411-
  

Fault Injection, Diagnosis and Debugging

• Daniel Gil, Juan Carlos Baraza, J. V. Busquets, Pedro J. Gil:
  Fault Injection into VHDL Models: Analysis of the Error Syndrome of a Microcomputer System. 10418-10425
  
• Maximilian Frey, Bernd-Holger Schlingloff:
  On-the-Fly Model Checking of Program Runs for Automated Debugging. 10426-
  

Development Approaches

• Mats Per Erik Heimdahl, Jeffrey M. Thompson, Michael W. Whalen:
  On the Effectiveness of Slicing Hierarchical State Machines: A Case Study. 10435-10444
  
• Peter R. Croll, Chris Rudram, Colin Chambers, Naoshi Uchihira:
  Engineering Safe, Real-Time Distributed Control Systems. 10445-10452
  
• Roman Gumzej, Matjaz Colnaric, Domen Verber, Wolfgang A. Halang:
  Towards Standard-Based Specification and Design of Embedded Real-Time Systems. 10453-
  

Fault Treatment

• A. Maamar, G. Russell:
  A 32-Bit Risc Processor with Concurrent Error Detection. 10461-10467
  
• Holger Karl, Matthias Werner, Lars Küttner:
  An Experimental Investigation of Message Latencies in the Totem Protocol in the Presence of Faults. 10468-10475
  
• Kam-yiu Lam, Tony S. H. Lee:
  Approaches for Scheduling of Triggered Transactions in Real-Time Active Database Systems. 10476-
  

Volume II

Formal Specifications

• Marjeta Frey-Pucko, Maximilian Frey:
  Multi-View Specification of CSCW Applications. 20484-20491
  
• Cyril Decleir, Mohand-Said Hacid, Jacques Kouloumdjian:
  Modeling and Querying Video Databases. 20492-
  

Architectures

• F. Calzolari, Paolo Tonella:
  Modeling Client/Server Interactions by Means of Dynamic Systems. 20499-20505
  
• Chung-Ming Huang, Chian Wang, Cheng-Yi Kuo:
  A Master-Medium-Based Interactive Synchronization Control Scheme for Distributed Multimedia Systems. 20506-20513
  
• Michael Weeks, Hadj Batatia, Reza Sotudeh:
  Improved Multimedia Server I/O Subsystems. 20514-
  

Performance Evaluation

• Yu-Chang Chen, Chien-Chih Chang, Wen-Shyong Hsieh, Chu-Sing Yang:
  Address Resolution Model and Traffic Control for Multimedia Data Transmission with QoS Guarantees between ATM and Ethernet. 20520-20527
  
• Dionysis Papadimatos, Theodore Antonakopoulos, Vassilios Makios:
  Real-Time Disparity Information Compression in 3D Teleconferencing Systems. 20528-20535
  
• Silvello Betti, E. Bravi, M. Giaconi:
  Comparison between Optical SCM Systems for Multimedia Applications. 20536-20543
  
• Adam Belloum, Louis O. Hertzberger:
  Dealing with One-Timer-Documents in Web Caching. 20544-
  

HW and Operating Systems

• Alberto García-Martínez, Jesús Fernández-Conde, Ángel Viña:
  Efficient Memory Management in VOD Disk Array Servers Using Per-Storage-Device Buffering. 20551-20558
  
• Stamatis Vassiliadis, Edwin A. Hakkennes, J. S. S. M. Wong, Gerald G. Pechanek:
  The Sum-Absolute-Difference Motion Estimation Accelerato. 20559-20566
  
• Kimmo Kaario, Pertti Raatikainen:
  Dimensioning of a Multimedia Switching Bus. 20567-
  

Network and Operating Systems

• Sugh-Hoon Lee, Sungyoung Lee:
  Retransmission Scheme for MPEG Streams in Mission Critical Multimedia Applications. 20574-20580
  
• Eduardo Magaña, Javier Aracil, Jesús E. Villadangos:
  PROMIS: A Reliable Real-Time Network Management Tool for Wide Area Networks. 20581-20588
  
• Jeong-Gook Koh, Gil-Yong Kim:
  Design and Performance Evaluation of a Buffer Replacement Algorithm Utilizing Reference Interval Information. 20589-20596
  
• Gaetano Vespasiano, Maria Stella Iacobucci, Pasquale Palma:
  Broadband Services in the Access Network: A Technical-Economic Comparison of Wired and Wireless Systems. 20597-
  

Prototyping Systems and Applications (I)

• Eng Huat Ng, Stu Wade:
  Designing Interactive Multimedia Learning Systems on the Web Using a New Graphical Navigational Design Technique. 20604-20609
  
• Seungtaek Oh, Yung Yi, Seunghoon Jeong, Yanghee Choi, Younghwa Ko:
  Experiments with MHEG Player/Studio: An Interactive Hypermedia Visualization and Authoring System. 20610-20615
  
• Perfecto Mariño, Miguel Angel Domínguez:
  Integration of Image Processing and Automated Testing in a Manufacturing Client-Server Network. 20616-
  

Prototyping Systems and Applications (II)

• Dimitrios I. Rigas, James L. Alty:
  Using Sound to Communicate Program Execution. 20625-20632
  
• Dimitris A. Karras, S. A. Karkanis, Basil G. Mertzios:
  Image Compression Using the Wavelet Transform on Textural Regions of Interest. 20633-20639
  
• Bob Newman:
  A Methodology for Design of Large Hypermedia Systems. 20640-
  

Keynote Speech

• Manfred Glesner, Matthias Rychetsky, Stefan Ortmann:
  Advanced Hardware and Software Architectures for Computational Intelligence: Application to a Real World Problem. 21068-
  

Computational Intelligence

• Nigel Steele, A. Dobnikar:
  Novel Internal Units for a Neural Network Based Adaptive Fuzzy Inference Systems. 20647-
  

Neural Networks I

• Andreas König, Michael Eberhardt, Robert Wenzel:
  A Transparent and Flexible Development Environment for Rapid Design of Cognitive Systems. 20655-20662
  
• Ion Ciuca:
  On Function Approximators Implementable as Layered Neural Networks. 20663-20669
  
• Dimitris A. Karras, I. J. Marmatsouri, E. J. Hatzakis, N. Paritsis:
  On Feature Selection Methods in the Application of Neural Networks to Social Sciences. 20670-
  

Neural Networks II

• Peter Glösekötter, Andreas Kanstein, Stefan Jung, Karl Goser:
  Implementation of a RBF Network Based on Possibilistic Reasoning. 20677-20682
  
• Dimitris A. Karras, Isaac E. Lagaris:
  A Novel Neural Network Training Technique Based on a Multi-Algorithm Constrained Optimization Strategy. 20683-20687
  
• David Abramson, Kate A. Smith, Paul Logothetis, David J. Duke:
  FPGA Based Implementation of a Hopfield Neural Network for Solving Constraint Satisfaction Problems. 20688-20693
  
• Harald Wüst, Klaus Kasper, Herbert Reininger:
  Hybrid Number Representation for the FPGA-Realization of a Versatile Neuro-Processor. 20694-
  

Genetic Algorithms

• Melquíades Pérez Pérez, Francisco Almeida, J. Marcos Moreno-Vega:
  Genetic Algorithm with Multistart Search for the p-Hub Median Problem. 20702-20707
  
• Yannick Monnier, Jean-Pierre Beauvais, Anne-Marie Déplanche:
  A Genetic Algorithm for Scheduling Tasks in a Real-Time Distributed System. 20708-20714
  
• Gianluigi Folino, Clara Pizzuti, Giandomenico Spezzano:
  Solving the Satisfiability Problem by a Parallel Celluar Genetic Algorithm. 20715-
  

Knowledge Manipulation and Classification

• José Mira, Juan Carlos Herrero, Ana E. Delgado García:
  Where is Knowledge in Computational Intelligence?: On the Reduction of the Knowledge Level to the Level Below. 20723-20732
  
• Tony Y. T. Chan:
  A Fast Metric Approach to Feature Subset Selection. 20733-20736
  
• Samuel Túnez, Roque Marín, Isabel María del Águila, Alfonso Bosch, Manuel Torres:
  An Abductive Method for Solving a Treatment Problem. 20737-20744
  
• Jouni Raitamäki:
  Improving the Performance of Fuzzy Systems by Using Local Partitioning. 20745-
  

Software Process Improvement

• Xavier Franch, Josep M. Ribó Balust:
  A Structured Approach to Software Process Modelling. 20753-20762
  
• Tapani Kilpi:
  Towards Continuous Process Development: Designing SQA Function for Large Organisation Needs. 20763-20768
  
• Akif Günes Koru, Elif Demirörs, Onur Demirörs:
  Process-Product Unification in a Decentralized Environment: A Status Report. 20769-20774
  
• R. Maier:
  Process Improvement by Change of Paradigm in an Agriculture Company. 20775-
  

Change Management

• W. Lam, V. Shankararaman:
  Managing Change in Software Development Using a Process Improvement Approach. 20779-20786
  
• Emilio Benedetti, Luisa Consolini:
  CMOS - Change Management Of Software ESSI PIE nr. 23661. 20787-20793
  
• Ivica Crnkovic:
  A Change Process Model in an SCM Tool. 20794-
  

Improving Software Development

• Michael Winokur, Arie Grinman, Israel Yosha, Reuven Gallant:
  Measuring the Effectiveness of Introducing New Methods in the Software Development Process. 20800-20807
  
• Volkmar H. Haase:
  Software Process Improvement Planning with Neural Networks. 20808-20815
  
• Ignac Lovrek, Vjekoslav Sinkovic, Dejan Grahovac, Antun Caric:
  An Approach to Schedule Estimation and Tracking for Rapid Development Projects. 20816-20823
  
• Klaus D. Zesar, Michael Zechner, Peter Salhofer, Gerhard Schuster, Gerfried Muelleitner:
  Performance and Quality Aspects of Virtual Software Enterprises. 20824-
  

Testing

• Hareton K. N. Leung:
  Test Tools for the Year 2000 Challenges. 20830-20837
  
• Mazen Malek, Sarolta Dibuz:
  Pragmatic Method for Interoperability Test Suite Derivation. 20838-20844
  
• V. V. Ostapenko:
  Test Selection Based on Implementation Specification. 20845-
  

Improving Software Development Maturit

• Per Runeson, Peter Isacsson:
  Software Quality Assurance - Concepts and Misconceptions. 20853-20859
  
• Anne Mette Jonassen Hass, Jørn Johansen, Jan Pries-Heje:
  Does ISO 9001 Increase Software Development Maturity?. 20860-20866
  
• Janne Kiiskilä:
  Practical Aspects on the Assessment of a Review Process. 20867-20870
  
• Hans Erik Stokke:
  Software Development Process Improvements by Metrics - A Taming of Chaos. 20871-
  

Increasing Software Reuse

• Michel Ezran, Maurizio Morisio, Colin Tully:
  A Survey of European Reuse Experiences: Initial Results. 20875-20881
  
• Ewan Smith, Adil Al-Yasiri, Madjid Merabti:
  A Multi-Tiered Classification Scheme for Component Retrieval. 20882-20889
  
• Elisabetta Morandin, Gianfranco Stellucci, Francesco Baruchelli:
  A Reuse-Based Software Process Based on Domain Analysis and OO Framework. 20890-
  

Better Products by Better Processes

• Dirk Hamann, Janne Järvinen, Andreas Birk, Dietmar Pfahl:
  A Product-Process Dependency Definition Method. 20898-20904
  
• Jorma Taramaa, Munish Khurana, Pasi Kuvaja, Jari Lehtonen, Markku Oivo, Veikko Seppänen:
  Product-Based Software Process Improvement for Embedded Systems. 20905-20912
  
• Barry McCollum, Vaughan Purnell, Patrick H. Corr, Peter Milligan:
  The Improvement of a Software Design Methodology by Encapsulating Knowledge from Code. 20913-20918
  
• Christian Kreiner, Christian Steger, Reinhold Weiss:
  Improvement of Control Software for Automatic Logistic Systems Using Executable Environment Models. 20919-20923
  
• José R. P. Ribeiro, Nilton C. da Silva, Roxana G. Morón, Célio Estevan Morón:
  From Design to Implementation Using the Parallel Program Generator. 20924-
  

Keynote Speech

• Giovanni Chiola:
  Some Research Projects on Clusters of Personal Computers.
  
• Colin Allison, Martin Bramley, Jose Serrano:
  The World Wide Wait: Where Does the Time Go? 20932-20938
  
• Gilbert Babin, Peter G. Kropf, Herwig Unger:
  Two-Level Communication Protocol for a Web Operating System (WOS?). 20939-20944
  
• Djamshid Tavangarian, Peter Eschholz, Michael Koch, Stephan Preuß:
  Wide-Area High-Performance Computing Using Workstations. 20945-
  

Parallel and Cluster Computing

• Antônio Augusto Fröhlich, Wolfgang Schröder-Preikschat:
  SMP PCs: A Case Study on Cluster Computing. 20953-20960
  
• José L. Roda, Casiano Rodríguez, Daniel González-Morales, Francisco Almeida:
  Bulk Synchronous Parallel without Barriers. 20961-20968
  
• Bettina Schnor, Stefan Petri, Matthias Becker:
  Scalability of Multicast Based Synchronization Methods. 20969-20975
  
• Mahmoud Mofaddel, Djamshid Tavangarian:
  User-Profile Adaptable Resource Management System for Workstation Cluster Architectures. 20976-
  

Web Languages

• Ferenc Vajda:
  The Pros and Cons of Web Programming. 20984-20988
  
• Eila Niemelä, Mikko Holappa:
  Experiences with the Use of CORBA. 20989-20996
  
• Andreas Polze, Lui Sha:
  Composite Objects: Real-Time Programming with CORBA. 20997-
  

Mobile and Distributed Systems

• Wolfgang Obelöer, Claus Grewe, Holger Pals:
  Load Management with Mobile Agents. 21005-21012
  
• Christophe Lizzi, Eric Gressier-Soudan:
  A Real-Time IPC Service over ATM Networks for the Chorus Distributed System. 21013-21020
  
• Ali R. Hurson, Y. C. Chehadeh, Les L. Miller:
  Object Organization on a Single Broadcast Channel in a Global Information Sharing Environment. 21021-
  

Protocols and Tools

• R. S. Fish, J. M. Graham, Roger J. Loader:
  DRoPS: Kernel Support For Runtime Adaptable Protocols. 21029-21036
  
• Dmitry Arapov, Victor Ivannikov, Alexey Kalinov, Alexey L. Lastovetsky, Ilya Ledovskih:
  Managing Processes with Network Objects and Their Translation. 21037-
  

Network Computing Applications

• Moritz Schulé, Michael Meißner:
  Parallelization of Volume Visualization on Computer Networks. 21045-21052
  
• Adrianos Lachanas, Paraskevas Evripidou, Silas Michaelides:
  Regional Weather Prediction on Small Network of Workstations. 21053-21060
  
• Edelhard Becker, Roland Hoyss, Thomas Grunert:
  A System for Cooperative Work in the Medical Domain. 21061-
  

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