Jean Mermet (Ed.):
Proceedings EURO-DAC'94, European Design Automation Conference, Grenoble, France, September 19-22, 1994.
IEEE Computer Society 1994, ISBN 0-89791-685-9
Kerry S. Lowe, P. Glenn Gulak: A unified discrete gate sizing/cell library optimization method for design and analysis of delay minimized CMOS and BiCMOS circuits.
42-47
Klaus Buchenrieder, Christian Veith: A prototyping environment for control-oriented HW/SW systems using state-charts, activity-charts and FPGA's.
60-65
Nick Filer, Michael Brown, Zahir Moosa: Integrating CAD tools into a framework environment using a flexible and adaptable procedural interface.
200-205
Olav Schettler: Design tool encapsulation—all problems solved?
206-211
Frank Vahid, Daniel D. Gajski, Jie Gong: A binary-constraint search algorithm for minimizing hardware during hardware/software partitioning.
214-219
Roman Kuznar, Baldomir Zajc, Franc Brglez: A unified cost model for min-cut partitioning with replication applied to optimization of large heterogeneous FPGA partitions.
271-276
Chris J. Rousse, Alison J. Carter: The use of single and multiple seed architectures with a natural based micro-architecture exploration algorithm.
354-359
E. Griese, J. Schrage, M. Vogt: Fast simulation method for the detection of reflection - and crosstalk effects during the design of complex printed circuit boards.
408-413
Stefan Öing, Werner John: Design support of printed circuit boards concerning radiation and irradiation effects (EMI): using an extended EMC-Workbench.
414-419
Loïc Vandeventer, Jean François Santucci: Algorithms for behavioral test pattern generation from VHDL circuit descriptions containing loop language constructs.
638-643
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