Gordon Adshead, Jochen A. G. Jess (Eds.):
European Design Automation Conference, EURO-DAC 1990, Glasgow, Scotland, UK, March 12-15, 1990.
IEEE Computer Society 1990, ISBN 0-8186-2024-2
Tools for testing
Databases and frameworks
: On the notion of the normal form register-level structures and its applications in design-space exploration.
: Functional semantics of microprocessors at the microprogram level and correspondence with the machine instruction level.
Scheduling and allocation I
: A branch-and-bound method for optimal transformation of data flow graphs for observing hardware constraints.
, Barry M. Pangrle
: SCHALLOC: an algorithm for simultaneous scheduling & connectivity binding in a datapath synthesis system.
Scheduling and allocation II
: Interconnect optimisation during data path allocation.
: Matching system and component behaviour in MIMOLA synthesis tools.
Description of design systems and methodologies
: Automatic knowledge acquisition in a digital circuit design system.
Compaction and circuit packing
Combinational logic design optimization
, C. Lyden
: An event-driven transient simulation algorithm for MOS and bipolar circuits.
R. A. Cottrell
: Event-driven behavioural simulation of analogue transfer functions.
High level synthesis systems
Delay and CMOS testing
, B. Courtois
: Robust tests for stuck-open faults and design for testability of reconvergent fan-out CMOS logic networks.
Niraj K. Jha
, Qiao Tong
: Detection of multiple input bridging and stuck-on faults in CMOS logic circuits using current monitoring.
Databases and datastructuring
Physical verification and simulation
Low-level fault modelling and test generation
Selected topics in CAD systems
Test pattern generation and fault simulation
Timing analysis and verification
Finit state machine synthesis I
Physical design optimization
Finite state machine synthesis - II
Verification and PLA testing
Novel approaches in placement
, J. Gan
: Fuzzy set based initial placement for IC layout.