5. DELTA 2010: Ho Chi Minh City, Vietnam

DfT and BIST

• Chih-Sheng Hou, Jin-Fu Li, Che-Wei Chou:
  Test and Repair Scheduling for Built-In Self-Repair RAMs in SOCs. 3-7
  
• Manuel J. Barragan Asian, Gloria Huertas, Adoración Rueda, José Luis Huertas:
  (Some) Open Problems to Incorporate BIST in Complex Heterogeneous Integrated Systems. 8-13
  
• Raimund Ubar, Sergei Devadze, Jaan Raik, Artur Jutman:
  Fast Fault Simulation for Extended Class of Faults in Scan Path Circuits. 14-19
  
• Hiroshi Iwata, Satoshi Ohtake, Hideo Fujiwara:
  Enabling False Path Identification from RTL for Reducing Design and Test Futileness. 20-25
  

Signal and Image Processing

• Andrew Gilman, Donald G. Bailey, Stephen Marsland:
  Least-squares Optimal Interpolation for Fast Image Super-resolution. 29-34
  
• Byung Hoon Na, Kwang Mo Park, Sooraj R., Bong Kyu Jeong, Young Min Song, Yong Tak Lee, Chang-Soo Park:
  Design, Fabrication and Characterization of Asymmetric Fabry-Perot Modulator for Large Size Optical Shutter. 35-38
  
• Ka Lai Lau, Sylvain Léomant, Amine Bermak:
  A Hybrid CMOS DPS with Conditional Data Readout Scheme. 44-47
  

Low Power

• Dalila Salhi, Balwant Godara:
  A 75dB-gain Low-power, Low-noise Amplifier for Low-frequency Bio-signal Recording. 51-53
  
• Trong Tu Bui, Tadashi Shibata:
  A Low-Power Associative Processor with the R-th Nearest-Match Hamming-Distance Search Engine Employing Time-Domain Techniques. 54-57
  
• Young Jin Park, Hong Jun Choi, Cheol Hong Kim, Jong-Myon Kim:
  Energy-aware Filter Cache Architecture for Multicore Processors. 58-62
  
• Linwei Niu: Leakage-Aware Scheduling for (m, k)-Firm Real-Time Systems. 63-

Digital Design and Applications

• Thuong Le-Tien, Dien Vo-Ngoc, Lan Ngo-Hoang, Sungyoung Lee:
  Independent Component Analysis Applied to Watermark Extraction and its Implemented Model on FPGAs. 71-76
  
• Donald G. Bailey, Christopher T. Johnston:
  Algorithm Transformation for FPGA Implementation. 77-81
  
• Diem Tran, Thi To, Thuan Huynh, Phuong Nguyen:
  Designing a Harware Accelerator for Face Recognition Using Vector Quantization and Principal Component Analysis as a Component of SoPC. 82-86
  
• Toshinobu Matsuba, Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada:
  Aggressive Register Unsharing Based on SSA Transformation for Clock Enhancement in High-Level Synthesis. 87-92
  

Poster Session 1

• Xuan-Thang Vu, Nguyen Anh Duc, Trinh Anh Vu:
  16-QAM Transmitter and Receiver Design Based on FPGA. 95-98
  
• Arun Bhanu, Mark S. K. Lau, Keck Voon Ling, Vincent John Mooney III, Anshul Singh:
  A More Precise Model of Noise Based PCMOS Errors. 99-102
  
• Yuan Cao, Fang Tang, Amine Bermak, Thinh Le:
  A Smart CMOS Image Sensor with On-chip Hot Pixel Correcting Readout Circuit for Biomedical Applications. 103-107
  
• Janusz Sosnowski, Lukasz Tupaj:
  CPU Testability in Embedded Systems. 108-112
  

Analogue and Mixed-Signal Design

• Chun Wei Lin, Sheng-Feng Lin, Chi Fu Wang:
  Wide Band Linear Voltage-to-Current Converter Design. 115-120
  
• Wei-Yuan Chiu, Jiun-Wei Horng, Hung Lee, Chen-Chuan Huang:
  DVCC-Based Voltage-Mode Biquadratic Filter with High-Input Impedance. 121-125
  
• Soheil Ziabakhsh, Majid Ebrahimian: A 1.5-V, 2.4-GHz-Band CMOS Low-Noise Amplifier with Modified Input Matching Network. 126-

Communication and MIMO Implementations

• Huu Phu Bui, Le Khoa Dang, Anh Vinh Nguyen:
  Channel Auto-Correlation and Doppler Spectrum of MIMO Systems Using Circular Array. 135-138
  
• Peter J. Green, Desmond P. Taylor:
  FPGA Implementation of a Real Time Maximum Likelihood Space-Time Decoder on a MIMO Software Radio Test Platform. 139-143
  
• Ho Pham Huy Anh, Nguyen Huu Phuc:
  Inverse Neural MIMO NARX Model Identification of Nonlinear System Optimized with PSO. 144-149
  

Algorithms in Design

• Hoang-Anh Pham, Van-Hieu Bui, Anh-Vu Dinh-Duc:
  An Adaptive Huffman Decoding Algorithm for MP3 Decoder. 153-157
  
• Adam Burdeniuk, Kiet N. To, Cheng-Chew Lim, Michael J. Liebelt:
  An Event-Assisted Sequencer to Accelerate Matrix Algorithms. 158-163
  
• Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Paolo Bernardi, Matteo Sonza Reorda:
  An Exact and Efficient Critical Path Tracing Algorithm. 164-169
  
• Dinh Sy Hien:
  Development of Quantum Device Simulator, NEMO-VN2. 170-173
  

Advanced Communication Design

• Raghu Sunnadkal, Ben Soh, Hien Phan:
  A Four-Stage Design Approach Towards Securing a Vehicular Ad Hoc Networks Architecture. 177-182
  
• Andreas Habegger, Andreas Stahel, Josef Goette, Marcel Jacomet:
  An Efficient Hardware Implementation for a Reciprocal Unit. 183-187
  
• A. Price, R. Rimington, Moi-Tin Chew, Serge N. Demidenko:
  Project-Based Learning in Robotics and Electronics in Undergraduate Engineering Program Setting. 188-193
  
• Abhishek Pathak, Sushanta K. Mandal, Raj Kumar Nagpal, Rakesh Malik: Modelling of Power Distribution Network and Decoupling Network Design for High Speed VLSI Design. 194-

Parallel and Serial Design Techniques

• Mark S. K. Lau, Keck Voon Ling, Yun-Chung Chu, Arun Bhanu:
  Modeling of Probabilistic Ripple-Carry Adders. 201-206
  
• Qingzheng Li, Guixuan Liang, Amine Bermak:
  A High-speed 32-bit Signed/Unsigned Pipelined Multiplier. 207-211
  
• Christopher T. Johnston, Donald G. Bailey, Paul J. Lyons:
  Notations for Multiphase Pipelines. 212-216
  
• Thinh Ngoc Tran, Surin Kittitornkun:
  Massively Parallel Cuckoo Pattern Matching Applied for NIDS/NIPS. 217-221
  

Biomedical Devices

• Chacko John Deepu, Xiaoyuan Xu, Xiaodan Zou, Libin Yao, Yong Lian:
  An ECG-on-Chip for Wearable Cardiac Monitoring Devices. 225-228
  
• Julien Villemejane, Guillaume Mottet, Olivier Français, Bruno Le Pioufle, Jean-Pierre Lefevre, Marion Woytasik, Elisabeth Dufour-Gergam, Lluis M. Mir:
  Nanomanipulation of Living Cells on a Chip Using Electric Field: General Concepts and Microdevices. 229-232
  
• Yannick Bornat, Matthieu Raoux, Youssef Boutaib, Fabrice Morin, Gilles Charpentier, Jochen Lang, Sylvie Renaud:
  Detection of Electrical Activity of Pancreatic Beta-cells Using Micro-electrode Arrays. 233-236
  
• Zeng Lertmanorat, Dominique M. Durand:
  Integrated Multiplexer for Nerve Electrodes. 237
  

Advanced Design Solutions

• Amara Amara, Bastien Giraud, Olivier Thomas:
  An Innovative 6T Hybrid SRAM Cell in sub-32 nm Double-Gate MOS Technology. 241-244
  
• Paul Beckett, Heiko Rudolph:
  Run. 245-249
  
• Zwikamu Dubani, Ben Soh, Chris Seeling:
  A Novel Design Framework for Business Process Modelling in Automotive Industry. 250-255
  
• Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre:
  Evaluation of Resistance to Differential Power Analysis: Execution Time Optimizations for Designers. 256-261
  

Defects and Dependability

• Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine:
  Impact of Resistive-Bridging Defects in SRAM Core-Cell. 265-269
  
• Hans G. Kerkhoff, Xiao Zhang:
  Design of an Infrastructural IP Dependability Manager for a Dependable Reconfigurable Many-Core Processor. 270-275
  
• Melanie Po-Leen Ooi, Chris Chan, Wey Jean Tee, Ye Chow Kuang, Lindsay Kleeman, Serge N. Demidenko:
  Fast and Accurate Automatic Defect CLuster Extraction for Semiconductor Wafers. 276-280
  
• Dimitar Nikolov, Urban Ingelsson, Virendra Singh, Erik Larsson:
  Estimating Error-probability and its Application for Optimizing Roll-back Recovery with Checkpointing. 281-285
  

Poster Session 2

• Cuong Pham-Quoc, Anh-Vu Dinh-Duc:
  Hazard-free Muller Gates for Implementing Asynchronous Circuits on Xilinx FPGA. 289-292
  
• Tsuyoshi Iwagaki, Mineo Kaneko:
  A Pseudo-Boolean Technique for Generating Compact Transition Tests with All-Output-Propagation Properties. 293-296
  
• Thuong Le-Tien, Vu Phung-The:
  Routing and Tracking System for Mobile Vehicles in Large Area. 297-300
  

Invited Talks

• Tezaswi Raja, Samiha Mourad:
  Digital Logic Implementation in Memristor-Based Crossbars - A Tutorial. 303-309
  
• Loren Nolan, Moi-Tin Chew, Serge N. Demidenko, Melanie Po-Leen Ooi:
  Virtual Instrumentation Based IC Parametric Tester for Engineering Education. 310-315
  

Sensor Devices and Systems

• N. Khalid, Jugdutt Singh, Hai Phuong Le, Kriyang Shah, John Devlin, Z. Sauli:
  Very High Q, NEMS Inductor for 12GHz Wireless Sensor Applications. 319-324
  
• Stephen Paul van der Velden, Jugdutt Singh:
  Reconfigurable multivariable MEMS sensor array. 325-329
  
• Fang Tang, Amine Bermak:
  Read-out Circuit Analysis for High-speed Low-noise VCO Based APS CMOS Image Sensor. 330-335
  
• David Fitrio, Goran Panjkovic, Suhardi Tjoa, Andrew Berry: Modelling, Simulation and Design of Front End Electronics for Radiation Detectors. 336-

Advanced Testing Techniques

• Tomoo Inoue, Nobukazu Izumi, Yuki Yoshikawa, Hideyuki Ichihara:
  A Fast Threshold Test Generation Algorithm Based on 5-Valued Logic. 345-349
  
• Gustavo P. Rehder, Salvador Mir, Libor Rufer, Emmanuel Simeu, Hoang Nam Nguyen:
  Low Frequency Test for RF MEMS Switches. 350-354
  
• Jongwoo Jun, Jinyi Lee, Jaesun Lee:
  The Discrimination of Metallic Coins Using a Scan Type Magnetic Camera. 355-359
  
• Jian Wei Cheng, Melanie Po-Leen Ooi, Chris Chan, Ye Chow Kuang, Serge N. Demidenko:
  Evaluating the Performance of Different Classification Algorithms for Fabricated Semiconductor Wafers. 360-366
  

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