22. DAC 1985:
Las Vegas, Nevada, USA Hillel Ofek , Lawrence A. O'Neill (Eds.):
Proceedings of the 22nd ACM/IEEE conference on Design automation, DAC 1985, Las Vegas, Nevada, USA, 1985.
ACM 1985, ISBN 0-8186-0635-5
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Roger J. Pachter :
Computer aided (CA) tools integration and related standards development in a multi-vendor universe (panel session).
94-95
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Raj Abraham :
Custom microcomputers for CAD optimization software.
102-110
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Yehuda E. Kalay :
A database management approach to CAD/CAM systems integration.
111-116
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conf/dac/Marek-Sadowska85 export record as
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Cecelia Jankowski :
Engineering workstation applications to systems design (panel session): life above the IC.
159-160
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J. P. Simmons Jr. :
Early verification of prototype tooling for IC designs (tutorial).
161
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José Monteiro da Mata :
ALLENDE: a procedural language for the hierarchical specification of VLSI layouts.
183-189
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conf/dac/AgrawalCPLMPSB85 export record as
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Francine S. Frome :
Course, video, and manual dexterity (tutorial): tailoring training to CAD users.
226-231
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Neil Bergmann :
Generalised CMOS-a technology independent CMOS IC design style.
273-278
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Erich Barke :
Resistance calculation from mask artwork data by finite element method.
305-311
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Thomas R. Smith :
A data architecture for an uncertain design and manufacturing environment.
312-318
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David M. Lewis :
A hardware engine for analogue mode simulation of MOS digital circuits.
345-351
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Y. Eric Cho :
A subjective review of compaction (tutorial session).
396-404
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conf/dac/GiambiasiMLdDR85 export record as
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Raul Camposano :
Synthesis techniques for digital systems design.
475-481
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Rob A. Rutenbar :
Future directions for DA machine research (panel session).
496-497
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Robert Leonard Joseph :
An expert systems approach to completing partially routed printed circuit boards.
523-528
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John Lowell :
Computer aided design for analog applications (panel session): an assessment.
554
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E. T. Grinthal :
Software quality assurance for CAD (tutorial).
555-561
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Lu Sha ,
Robert W. Dutton :
An analytical algorithm for placement of arbitrarily sized rectangular blocks.
602-608
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John P. Blanks :
Near-optimal placement using a quadratic objective function.
609-615
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Paul McLellan :
Effective data management for VLSI design.
652-657
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Randal E. Bryant :
Symbolic manipulation of Boolean functions using a graphical representation.
688-694
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Yiwan Wong :
Hierarchical circuit verification.
695-701
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Edward H. Frank :
Switch-level simulation of VLSI using a special-purpose data-driven computer.
735-738
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Thomas J. Schaefer :
A transistor-level logic-with-timing simulator for MOS circuits.
762-765
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Edward Chan :
Development of a timing analysis program for multiple clocked network.
816-819
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Beth W. Tucker :
Electronic CAD/CAM-is it revolution or evolution (tutorial session).
830-834
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