CONPAR 1990: Zürich, Switzerland

Keynote Address

• Ambros P. Speiser:
  Digital Electronics for 50 Years: No Limits to Growth? 1-9
  

Invited Presentations

• Vijay P. Bhatkar:
  Parallel Computing: An Indian Perspective. 10-25
  
• Eddy Odijk:
  POOMA, POOL and Parallel Symbolic Computing: An Assessment. 26-38
  

New Models of Computation

• Paraskevas Evripidou, Jean-Luc Gaudiot:
  A Decoupled Data-Driven Architecture with Vectors and Macro Actors. 39-50
  
• Reiner W. Hartenstein, Alexander G. Hirschbiel, M. Weber:
  A Novel Paradigm of Parallel Computation and its Use to Implement Simple High Performance Hardware. 51-62
  
• Hideo Kikuchi, Takashi Yukawa, Kazumitsu Matsuzawa, Tsutomu Ishikawa:
  Presto: A Bus-Connected Multiprocessor for a Rete-Based Production System. 63-74
  

Performance Prediction, Analysis, and Measurement

• Anupam Basu, S. Srinivas, Kamlesh G. Kumar, Arogyaswami Paulraj:
  A Model for Performance Prediction of Message Passing Multiprocessors Achieving Concurrency by Domain Decomposition. 75-85
  
• Gordon Lyon, Robert Snelick:
  Workloads, Observables, Benchmarks and Instrumentation. 86-97
  
• Franz Sötz:
  A Method for Performance Prediction of Parallel Programs. 98-107
  

Parallel Linear Algebra

• Stefan Bondeli:
  Divide and Conquer: A New Parallel Algorithm for the Solution of a Tridiagonal Linear System of Equations. 108-119
  
• Jürgen Brehm, A. Böhm, Jens Volkert:
  Sparse Matrix Algorithms for SUPRENUM. 120-130
  
• El Mostafa Daoudi, Gaetan Libert:
  Parallel Givens Factorization on a Shared Memory Multiprocessor. 131-142
  

Logic Programming

• Yaoqing Gao, Chengzheng Sun, Shouren Hu:
  Study of a Parallel Inference Machine for Parallel Execution of Logic Programs. 143-153
  
• Amit Gupta, Anindo Banerjea, Vikas Jha, Vineet Bafna, P. C. P. Bhatt:
  Parallel Implementation of Logic Languages. 154-165
  
• Péter Kacsuk:
  Prolog Implementations on Parallel Computers. 166-175
  

Performance Monitoring and Debugging

• Bernd Mohr:
  Performance Evaluation of Parallel Programs in Parallel and Distributed Systems. 176-187
  
• Michael Moser:
  The ELAN Performance Analysis Environment. 188-199
  
• Martina Zitterbart:
  Monitoring and Debugging Transputer-Networks with NETMON-II. 200-209
  

Algorithms for Matrix Factorization

• Christian H. Bischof, Philippe G. Lacroute:
  An Adaptive Blocking Strategy for Matrix Factorizations. 210-221
  
• Jeremy Du Croz, Peter Mayes, Giuseppe Radicati di Brozolo:
  Factorizations of Band Matrices Using Level 3 BLAS. 222-231
  
• Markus Hegland:
  On the Computation of Breeding Values. 232-242
  

Large-Grain Data Flow

• Kechang Dai:
  Code Parallelization for the LGDG Large-Grain Dataflow Computation. 243-252
  
• David C. DiNucci, Robert G. Babb II:
  Development of Portable Parallel Programs with Large-Grain Data Flow 2. 253-264
  
• Olivier Maquelin:
  ADAM: A Coarse-Grain Dataflow Architecture that Addresses the Load Balancing and Throttling Problems. 265-276
  
• Stephan Murer:
  A Latency Tolerant Code Generation Algorithm for a Coarse Grain Dataflow Machine. 277-287
  

Compile-Time Analysis and Restructurers

• Rudolf Eigenmann, Jay Hoeflinger, Greg Jaxon, David A. Padua:
  Cedar Fortran and Its Compiler. 288-299
  
• Michael Gerndt, Hans P. Zima:
  Optimizing Communication in Superb. 300-311
  
• Sang Lyul Min, Yarsun Hsu, Hyoung-Joo Kim:
  A Design of Performance-optimized Control-based Synchronization. 312-323
  
• Kevin L. Spier, Boleslaw K. Szymanski:
  Interprocess Analysis and Optimization in the Equational Language Compiler. 324-335
  

Architectures and Algorithms for Image Processing

• B. Chardonnes, Roger D. Hersch, O. Kölbl:
  Transputer Based Distributed Cartographic Image Processing. 336-346
  
• Gu Qing Zuo, An Zhong Wang:
  MPS - An Experimental Multi-Microprocessor Based Parallel System. 347-354
  
• Wieslaw Lucjan Nowinski:
  Parallel Implementation of the Convultion Method in Image Reconstruction. 355-364
  
• D. Stokar, Anton Gunzinger, Walter Guggenbühl, Edi Hiltebrand, S. Mathis, P. Schaeren, Bruno Schneuwly, Markus Zeltner:
  SYDAMA II: A Heterogeneous Multiprocessor System for Real Time Image Processing. 365-373
  

Interconncetion Networks

• A. Harissis, C. Jam, A. Ambler:
  Analysis and Design of Circuit Switching Interconnection Networks Using 4×4 Nodes. 374-384
  
• Rudolf Holzner, Stefan Tomann:
  Design and Simulation of a Multistage Interconnection Network. 385-396
  
• Reinhard J. Richter:
  A Reconfigurable Interconnection Network for Flexible Pipelining. 397-404
  

Load Balancing and the Mapping Problem

• Jacques E. Boillat, Peter G. Kropf:
  A Fast Distributed Mapping Algorithm. 405-416
  
• Frank K. H. A. Dehne, Michel Gastaldo:
  A Note on the Load Balancing Problem for Coarse Grained Hypercube Dictionary Machines. 417-422
  
• Patrik Eklund, Michael Kaufmann:
  Hierarchical Wiring in Multigrids. 423-434
  

Efficient Use of Vector Processors

• L. Gross, P. Sternecker, Willi Schönauer:
  Optimal Data Structures for an Efficient Vectorized Finite Element Code. 435-446
  
• Oswald Haan, Walter Waelde:
  FFTVPLIB, a Collection of Fast Fourier Transforms for Vectorprocessors. 447-457
  
• Helmut Weberpals:
  Improving the Vector Performance via Algorithmic Domain Decomposition. 458-466
  

Communication Issues

• Jean-Yves Blanc, Denis Trystram:
  Implementation of Parallel Numerical Routines Using Broadcast Communication Schemes. 467-478
  
• Petro Istavrinos, Lothar Borrmann:
  A Process and Memory Model for a Parallel Distributed-Memory Machine. 479-488
  
• Léon Mugwaneza, Traian Muntean, Ibrahima Sakho:
  A Deadlock Free Routing Algorithm with Network Size Independent Buffering Space. 489-501
  

Process Partitioning and Work Distribution

• R. Beccard, Walter Ameling:
  From Object-Oriented Programming to Automatic Load Distribution. 502-512
  
• Frank Bieler:
  Partitioning Programs into Processes. 513-524
  
• Rüdiger Jakob, Harry F. Jordan:
  An MIMD Execution Environment with a Fixed Number of Processes. 525-535
  

Performance Considerations

• Bjørn Arild W. Baugstø, Jarle Fredrik Greipsland, J. Kamerbeek:
  Sorting Large Data Files on POOMA. 536-547
  
• Renate Knecht:
  Parallelizing Divide-and-Conquer Algorithms - Microtasking versus Autotasking. 548-558
  
• Eric Schnepf:
  The Performance of Linear Algebra Subprograms on the Siemens S Series. 559-568
  

Reconfigurable and Scalable Systems

• Kiril Boyanov, K. Yanev:
  A Family of Highly Parallel Computers. 569-580
  
• F. Höpfl, J. Schirrmacher, M. Trent:
  A Distributed Shared Memory Multiprocessor Kit with Scalable Local Complexity. 581-591
  
• Manu Thapar, Bruce Delagi:
  Scalable Cache Coherence for Large Shared Memory Multiprocessors. 592-603
  

Concurrency Control

• Valérie Issarny:
  Design and Implementation of an Exception Handling Mechanism for Communicating Sequential Processes. 604-615
  
• Hans-Jürgen Plewan, Peter Schlenk:
  Creating and Controlling Concurrency in Object Oriented Systems - A Case Study. 616-627
  
• Johann Rost, Erik Maehle:
  A Distributed Algorithm for Dynamic Task Scheduling. 628-639
  

Transputer Tools and Applications

• Jean-Marc Adamo, Christophe Bonello:
  TéNOR++: A Dynamic Configurer for SuperNode Machines. 640-651
  
• G. W. Chege, R. W. Taylor, J. M. Tealby:
  Parallel Modelling of Electromagnetic Field Scattering: A New Approach Using the Edinburgh Concurrent Supercomputer Facility. 652-664
  
• G. J. Shaw, A. Stewart, L. C. Waring:
  3D Multigrid Correction Methods for Transputer Networks. 665-671
  

Cellular/Systolic Architectures and Algorithms

• Jorge Humberto Conçalves Romero:
  A Comparative Study of Two Wavefront Implementations of a LU Solver Algorithm. 672-681
  
• Stanislav Sedukhin:
  Systolic Array Architecture for Two-Dimensional Discrete Fourier Transform. 682-691
  
• A. Zsótér, Tamás Legendi, G. Balázs:
  Design and Implementation of M1 Cellprocessor. 692-696
  

Implementation Issues for Novel Architectures and Languages

• H. Garsden, Andrew L. Wendelborn:
  A Comparison of Microtasking Implementations of the Applicative Language SISAL. 697-708
  
• Guang R. Gao, Herbert H. J. Hum, Yue-Bong Wong:
  An Efficient Scheme for Fine-Grain Software Pipelining. 709-720
  
• Dale H. Grit:
  Sisal on a Message Passing Architecture. 721-731
  

The TOPSYS Tool Environment

• Thomas Bemmerl:
  The TOPSYS Architecture. 732-743
  
• Thomas Bemmerl, Thomas Ludwig:
  MMK - A Distributed Operating System Kernel with Integrated Dynamic Loadbalancing. 744-755
  
• Thomas Bemmerl, Robert Lindhof, Thomas Treml:
  The Distributed Monitor System of TOPSYS. 756-765
  

Array Processors and Applications

• Maurice Clint, Jim Weston, C. W. Bleakney:
  Hybrid Algorithms for the Eigensolution of Large Sparse Symmetric Matrices on the AMT DAP 510. 766-773
  
• Peter M. Flanders:
  Virtual Systems Architecture on the AMT DAP. 774-785
  
• Michael Schäfer:
  Numerical Simulation of Thermal Convection on SIMD Computers. 786-795
  

High-Performance Systems and Accelerators

• Mikhail Makhaniok, Victor Cherniavsky, Reinhard Männer, Oliver Stucky:
  Massively Parallel Realization of Logical Operations in Distributed Parallel Systems. 796-805
  
• Nikolay N. Mirenkov:
  High-Performance Computer System "SIBERIA". 806-815
  
• Mike Ward, Paul Townsend, Günter Watzlawik:
  EDS Hardware Architecture. 816-827
  

Visualization and Runtime Analysis

• Franz Abstreiter:
  Visualizing and Analysing the Runtime Behavior of Parallel Programs. 828-839
  
• Thomas Bemmerl, Olav Hansen, Thomas Ludwig:
  PATOP for Performance Tuning of Parallel Programs. 840-851
  
• Sanjay Sharma:
  Real-time Visualization of Concurrent Processes. 852-862
  

Algorithmic Studies for Hypercube-Type Systems

• Michel Cosnard, Jean-Laurent Philippe:
  Achieving Superlinear Speedups for the Multiple Polynomial Quadratic Sieve Factoring Algorithm on a Distributed Memory Multiprocessor. 863-874
  
• Michel Cosnard, Pierre Fraigniaud:
  A Performance Analysis of Network Topologies in Finding the Roots of a Polynomial. 875-886
  
• Marián Vajtersic:
  Parallel Multigrid Algorithms for some Specialized Computer Systems. 887-896
  

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