CODES+ISSS 2011: Taipei, Taiwan

Keynote address

• Jane W.-S. Liu:
  To alert, rescue and recover: critical information technologies for managing mega disasters. 1-2
  

Memory controllers for high-performance and real-time MPSoCs: requirements, architectures, and future trends

• Benny Akesson, Po-Chun Huang, Fabien Clermidy, Denis Dutoit, Kees Goossens, Yuan-Hao Chang, Tei-Wei Kuo, Pascal Vivet, Drew Wingard:
  Memory controllers for high-performance and real-time MPSoCs: requirements, architectures, and future trends. 3-12
  

Flexible design of architectures and virtual machines

• Hiroaki Yoshida, Masahiro Fujita:
  An energy-efficient patchable accelerator for post-silicon engineering changes. 13-20
  
• Zefu Dai, Jianwen Zhu:
  A bursty multi-port memory controller with quality-of-service guarantees. 21-28
  
• Alejandro Masrur, Thomas Pfeuffer, Martin Geier, Sebastian Drössler, Samarjit Chakraborty:
  Designing VM schedulers for embedded real-time applications. 29-38
  

Do you handle data efficiently?

• Cesare Ferri, Andrea Marongiu, Benjamin Lipton, R. Iris Bahar, Tali Moreshet, Luca Benini, Maurice Herlihy:
  SoC-TM: integrated HW/SW support for transactional memory programming on embedded MPSoCs. 39-48
  
• Christian Pilato, Fabrizio Ferrandi, Donatella Sciuto:
  A design methodology to implement memory accesses in high-level synthesis. 49-58
  
• Stavros Tripakis, Hugo A. Andrade, Arkadeb Ghosal, Rhishikesh Limaye, Kaushik Ravindran, Guoqiang Wang, Guang Yang, Jacob Kornerup, Ian Wong:
  Correct and non-defensive glue design using abstract models. 59-68
  

Design and architecture for dependable embedded systems

• Jörg Henkel, Lars Bauer, Joachim Becker, Oliver Bringmann, Uwe Brinkschulte, Samarjit Chakraborty, Michael Engel, Rolf Ernst, Hermann Härtig, Lars Hedrich, Andreas Herkersdorf, Rüdiger Kapitza, Daniel Lohmann, Peter Marwedel, Marco Platzner, Wolfgang Rosenstiel, Ulf Schlichtmann, Olaf Spinczyk, Mehdi Baradaran Tahoori, Jürgen Teich, Norbert Wehn, Hans-Joachim Wunderlich:
  Design and architectures for dependable embedded systems. 69-78
  

Control your memory

• Luis Angel D. Bathen, Nikil D. Dutt, Dongyoun Shin, Sung-Soo Lim:
  SPMVisor: dynamic scratchpad memory virtualization for secure, low power, and high performance distributed on-chip memories. 79-88
  
• Garo Bournoutian, Alex Orailoglu:
  Dynamic, multi-core cache coherence architecture for power-sensitive mobile processors. 89-98
  
• Jan Reineke, Isaac Liu, Hiren D. Patel, Sungjun Kim, Edward A. Lee:
  PRET DRAM controller: bank privatization for predictability and temporal isolation. 99-108
  

Mapping of applications to MPSoCs

• Peter Marwedel, Jürgen Teich, Georgia Kouveli, Iuliana Bacivarov, Lothar Thiele, Soonhoi Ha, Chanhee Lee, Qiang Xu, Lin Huang:
  Mapping of applications to MPSoCs. 109-118
  

Tools and algorithms for exploration and synthesis of distributed embedded systems

• Sebastian Kobbe, Lars Bauer, Daniel Lohmann, Wolfgang Schröder-Preikschat, Jörg Henkel:
  DistRM: distributed resource management for on-chip many-core systems. 119-128
  
• Stefan Wildermann, Felix Reimann, Daniel Ziener, Jürgen Teich:
  Symbolic design space exploration for multi-mode reconfigurable systems. 129-138
  
• Reinhard Schneider, Dip Goswami, Sohaib Zafar, Martin Lukasiewycz, Samarjit Chakraborty:
  Constraint-driven synthesis and tool-support for FlexRay-based automotive control systems. 139-148
  

Reliability, energy, and buffering in real-time systems

• Philip Axer, Maurice Sebastian, Rolf Ernst:
  Reliability analysis for MPSoCs with mixed-critical, hard real-time constraints. 149-158
  
• Linwei Niu, Wei Li:
  Energy-efficient fixed-priority scheduling for real-time systems based on threshold work-demand analysis. 159-168
  
• Balaji Raman, Guillaume Quintin, Wei Tsang Ooi, Deepak Gangadharan, Jerome Milan, Samarjit Chakraborty:
  On buffering with stochastic guarantees in resource-constrained media players. 169-178
  

Thermal issues in timing variability, power budgeting, and 3D

• Pratyush Kumar, Lothar Thiele:
  System-level power and timing variability characterization to compute thermal guarantees. 179-188
  
• Thomas Ebi, David Kramer, Wolfgang Karl, Jörg Henkel:
  Economic learning for thermal-aware power budgeting in many-core architectures. 189-196
  
• Alain Fourmigue, Giovanni Beltrame, Gabriela Nicolescu, El Mostapha Aboulhamid:
  A linear-time approach for the transient thermal simulation of liquid-cooled 3d ics. 197-206
  

Modeling and controlling MPSoCs and NoCs

• Mwaffaq Otoom, JoAnn M. Paul:
  Capacity metric for chip heterogeneous multiprocessors. 207-216
  
• Thomas Canhao Xu, Pasi Liljeberg, Hannu Tenhunen:
  Optimal memory controller placement for chip multiprocessor. 217-226
  
• Moustafa Mohamed, Zheng Li, Xi Chen, Alan Rolf Mickelson, Li Shang:
  Modeling and analysis of micro-ring based silicon photonic interconnect for embedded systems. 227-236
  

Reliability boosting layers for robust embedded systems

• Semeen Rehman, Muhammad Shafique, Florian Kriebel, Jörg Henkel:
  Reliable software for unreliable hardware: embedded code generation aiming at reliability. 237-246
  
• Jia Huang, Jan Olaf Blech, Andreas Raabe, Christian Buckl, Alois Knoll:
  Analysis and optimization of fault-tolerant task scheduling on multiprocessor embedded systems. 247-256
  
• Shahin Golshan, Amin Khajeh, Houman Homayoun, Eli Bozorgzadeh, Ahmed M. Eltawil, Fadi J. Kurdahi:
  Reliability-aware placement in SRAM-based FPGA for voltage scaling realization in the presence of process variations. 257-266
  

Energy and entropy

• Kai Lampka, Kai Huang, Jian-Jia Chen:
  Dynamic counters and the efficient and effective online power management of embedded real-time systems. 267-276
  
• Qing Xie, Yanzhi Wang, Younghyun Kim, Naehyuck Chang, Massoud Pedram:
  Charge allocation for hybrid electrical energy storage systems. 277-284
  
• Benjamin Menhorn, Frank Slomka:
  Design entropy concept: a measurement for complexity. 285-294
  

Efficient simulation and debugging techniques

• Yu-Ting Chen, Jason Cong, Glenn Reinman:
  HC-Sim: a fast and exact l1 cache simulator with scratchpad memory co-simulation support. 295-304
  
• Stefan Stattelmann, Oliver Bringmann, Wolfgang Rosenstiel:
  Dominator homomorphism based code matching for source-level simulation of embedded software. 305-314
  
• Gummidipudi Krishnaiah, B. V. N. Silpa, Preeti Ranjan Panda, Anshul Kumar:
  Exploiting temporal decoupling to accelerate trace-driven NoC emulation. 315-324
  

Emerging non-volatile memories: opportunities and challenges

• Chun Jason Xue, Youtao Zhang, Yiran Chen, Guangyu Sun, J. Jianhua Yang, Hai Li:
  Emerging non-volatile memories: opportunities and challenges. 325-334
  

Microfluidic biochips: recent research and emerging challenges

• Tsung-Yi Ho, Krishnendu Chakrabarty, Paul Pop:
  Digital microfluidic biochips: recent research and emerging challenges. 335-344
  

Configurations, hints, and management strategies for special-purpose processors

• Junwhan Ahn, Kiyoung Choi:
  An efficient algorithm for isomorphism-aware custom instruction identification for extensible processors. 345-354
  
• Jing Lu, Yooseong Kim, Aviral Shrivastava, Chuan Huang:
  Branch penalty reduction on IBM cell SPUs via software branch hinting. 355-364
  
• Waheed Ahmed, Muhammad Shafique, Lars Bauer, Jörg Henkel:
  Adaptive resource management for simultaneous multitasking in mixed-grained reconfigurable multi-core processors. 365-374
  

Tutorial 1

• Sander Stuijk, Twan Basten, Benny Akesson, Marc Geilen, Orlando Moreira, Jan Reineke:
  Designing next-generation real-time streaming systems. 375-376
  

Tutorial 2

• Krishnendu Chakrabarty, Paul Pop, Tsung-Yi Ho:
  Digital microfluidic biochips: functional diversity, more than moore, and cyberphysical systems. 377-378
  

Industry keynote & panel

• Ted Chang:
  ESWEEK industry keynote: embedding the cloud. 379-380
  
• Kuen-Jong Lee, Chin-Yao Chang, I.-Jou Chen:
  EPIDETOX: an ESL platform for integrated circuit design and tool exploration. 381-384
  
• Qiaosha Zou, Yibo Chen, Yuan Xie, Alan Su:
  System-level design space exploration for three-dimensional (3D) SoCs. 385-388
  
• Chi-Hung Lin, Wen-Tsan Hsieh, Hsien-Ching Hsieh, Chun-Nan Liu, Jen-Chieh Yeh:
  System-level design exploration for 3-D stacked memory architectures. 389-390
  

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