CODES 2002: Estes Park, Colorado, USA

Advances in system specification and system design frameworks

• Brian Grattan, Greg Stitt, Frank Vahid:
  Codesign-extended applications. 1-6
  
• Todor Stefanov, Bart Kienhuis, Ed F. Deprettere:
  Algorithmic transformation techniques for efficient exploration of alternative application instances. 7-12
  
• Felice Balarin, Luciano Lavagno, Claudio Passerone, Alberto L. Sangiovanni-Vincentelli, Yosinori Watanabe, Guang Yang:
  Concurrent execution semantics and sequential simulation algorithms for the metropolis meta-model. 13-18
  
• JoAnn M. Paul, Christopher M. Eatedali, Donald E. Thomas:
  The design context of concurrent computation systems. 19-24
  
• Dag Björklund, Johan Lilius:
  A language for multiple models of computation. 25-30
  

System design methods: analysis and verification

• Per Bjuréus, Mikael Millberg, Axel Jantsch:
  FPGA resource and timing estimation from Matlab execution traces. 31-36
  
• Axel Siebenborn, Oliver Bringmann, Wolfgang Rosenstiel:
  Worst-case performance analysis of parallel, communicating software processes. 37-42
  
• Mauricio Varea, Bashir M. Al-Hashimi, Luis Alejandro Cortés, Petru Eles, Zebo Peng:
  Symbolic model checking of Dual Transition Petri Nets. 43-48
  
• G. D. Nagendra, V. G. Prem Kumar, B. S. Sheshadri Chakravarthy:
  Simulation bridge: a framework for multi-processor simulation. 49-54
  

System design methods: analysis and verification

• Donatella Sciuto, Fabio Salice, Luigi Pomante, William Fornaciari:
  Metrics for design space exploration of heterogeneous multiprocessor embedded systems. 55-60
  
• Juha-Pekka Soininen, Jari Kreku, Yang Qu, Martti Forsell:
  Fast processor core selection for WLAN modem using mappability estimation. 61-66
  
• Maurizio Palesi, Tony Givargis:
  Multi-objective design space exploration using genetic algorithms. 67-72
  
• Rajeshwari Banakar, Stefan Steinke, Bo-Sik Lee, M. Balakrishnan, Peter Marwedel:
  Scratchpad memory: design alternative for cache on-chip memory in embedded systems. 73-78
  
• Mohamed Shalan, Vincent John Mooney III:
  Hardware support for real-time embedded multiprocessor system-on-a-chip memory management. 79-84
  
• Abdenour Azzedine, Jean-Philippe Diguet, Jean-Luc Pillippe:
  Large exploration for HW/SW partitioning of multirate and aperiodic real-time systems. 85-90
  

Co-design architecture and synthesis

• Jeffry T. Russell:
  Program slicing for codesign. 91-96
  
• T. Vinod Kumar Gupta, Roberto E. Ko, Rajeev Barua:
  Compiler-directed customization of ASIP cores. 97-102
  
• Avishay Orpaz, Shlomo Weiss:
  A study of CodePack: optimizing embedded code space. 103-108
  
• Christian Kreiner, Christian Steger, Egon Teiniker, Reinhold Weiss:
  A novel codesign approach based on distributed virtual machines. 109-114
  
• Massimiliano Chiodo:
  Optimization and synthesis for complex reactive embedded systems by incremental collapsing. 115-120
  

System partitioning and timing analysis

• Marek Jersak, Kai Richter, Rafik Henia, Rolf Ernst, Frank Slomka:
  Transformation of SDL specifications for system-level timing analysis. 121-126
  
• Ali Dasdan:
  A strongly polynomial-time algorithm for over-constraint resolution: efficient debugging of timing constraint violations. 127-132
  
• Hyunok Oh, Soonhoi Ha:
  Hardware-software cosynthesis of multi-mode multi-task embedded systems with real-time constraints. 133-138
  
• Martijn J. Rutten, Jos T. J. van Eijndhoven, Evert-Jan D. Pol:
  Design of multi-tasking coprocessor control for Eclipse. 139-144
  
• Daler N. Rakhmatov, Sarma B. K. Vrudhula:
  Hardware-software bipartitioning for dynamically reconfigurable systems. 145-150
  
• Massimo Baleani, Frank Gennari, Yunjian Jiang, Yatish Patel, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
  HW/SW partitioning and code generation of embedded control applications on a reconfigurable architecture platform. 151-156
  

Energy efficiency in system design

• Kanishka Lahiri, Anand Raghunathan, Sujit Dey:
  Fast system-level power profiling for battery-efficient system design. 157-162
  
• Guangyu Chen, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Wayne Wolf:
  Energy savings through compression in embedded Java environments. 163-168
  
• Jinfeng Liu, Pai H. Chou, Nader Bagherzadeh:
  Communication speed selection for embedded systems with networked voltage-scalable processors. 169-174
  
• Vishnu Swaminathan, Krishnendu Chakrabarty:
  Pruning-based energy-optimal device scheduling for hard real-time systems. 175-180
  
• Peter Petrov, Alex Orailoglu:
  Energy frugal tags in reprogrammable I-caches for application-specific embedded processors. 181-186
  

System design methods: scheduling advances

• Traian Pop, Petru Eles, Zebo Peng:
  Holistic scheduling and analysis of mixed time/event-triggered distributed embedded systems. 187-192
  
• Ismail Kadayif, Mahmut T. Kandemir, Ibrahim Kolcu, Guangyu Chen:
  Locality-conscious process scheduling in embedded systems. 193-198
  
• Sunghyun Lee, Sungjoo Yoo, Kiyoung Choi:
  Reconfigurable SoC design with hierarchical FSM and synchronous dataflow model. 199-204
  
• Juanjo Noguera, Rosa M. Badia:
  Dynamic run-time HW/SW scheduling techniques for reconfigurable architectures. 205-210
  
• Feng-Shi Su, Pao-Ann Hsiung:
  Extended quasi-static scheduling for formal synthesis and code generation of embedded software. 211-216
  

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