9. CHES 2007: Vienna, Austria

Differential and Higher Order Attacks

• Joshua Jaffe:
  A First-Order DPA Attack Against AES in Counter Mode with Unknown Initial Counter. 1-13
  
• Kerstin Lemke-Rust, Christof Paar:
  Gaussian Mixture Models for Higher-Order Side Channel Analysis. 14-27
  
• Jean-Sébastien Coron, Emmanuel Prouff, Matthieu Rivain:
  Side Channel Cryptanalysis of a Higher Order Masking Scheme. 28-44
  

Random Number Generation and Device Identification

• Markus Dichtl, Jovan Dj. Golic:
  High-Speed True Random Number Generation with Logic Gates Only. 45-62
  
• Jorge Guajardo, Sandeep S. Kumar, Geert Jan Schrijen, Pim Tuyls:
  FPGA Intrinsic PUFs and Their Use for IP Protection. 63-80
  

Logic Styles: Masking and Routing

• Thomas Popp, Mario Kirschbaum, Thomas Zefferer, Stefan Mangard:
  Evaluation of the Masked Logic Style MDPL on a Prototype Chip. 81-94
  
• Patrick Schaumont, Kris Tiri:
  Masking and Dual-Rail Logic Don't Add Up. 95-106
  
• Benedikt Gierlichs:
  DPA-Resistance Without Routing Constraints? 107-120
  

Efficient Algorithms for Embedded Processors

• Mitsuru Matsui, Junko Nakajima:
  On the Power of Bitslice Implementation on Intel Core2 Processor. 121-134
  
• Marc Joye:
  Highly Regular Right-to-Left Algorithms for Scalar Multiplication. 135-147
  
• Hirotaka Yoshida, Dai Watanabe, Katsuyuki Okeya, Jun Kitahara, Hongjun Wu, Özgül Küçük, Bart Preneel:
  MAME: A Compression Function with Reduced Hardware Requirements. 148-165
  

Collision Attacks and Fault Analysis

• Alex Biryukov, Andrey Bogdanov, Dmitry Khovratovich, Timo Kasper:
  Collision Attacks on AES-Based MAC: Alpha-MAC. 166-180
  
• Christophe Clavier:
  Secret External Encodings Do Not Prevent Transient Fault Analysis. 181-194
  
• Alex Biryukov, Dmitry Khovratovich:
  Two New Techniques of Side-Channel Cryptanalysis. 195-208
  

High Speed AES Implementations

• Owen Harrison, John Waldron:
  AES Encryption Implementation and Analysis on Commodity Graphics Processing Units. 209-226
  
• Stefan Lemsitzer, Johannes Wolkerstorfer, Norbert Felber, Matthias Braendli:
  Multi-gigabit GCM-AES Architecture Optimized for FPGAs. 227-238
  

Public-Key Cryptography

• Jean-Luc Beuchat, Nicolas Brisebarre, Jérémie Detrey, Eiji Okamoto:
  Arithmetic Operators for Pairing-Based Cryptography. 239-255
  
• Kimmo U. Järvinen, Juha Forsten, Jorma Skyttä:
  FPGA Design of Self-certified Signature Verification on Koblitz Curves. 256-271
  
• Daisuke Suzuki:
  How to Maximize the Potential of FPGA Resources for Modular Exponentiation. 272-288
  

Implementation Cost of Countermeasures

• Reouven Elbaz, David Champagne, Ruby B. Lee, Lionel Torres, Gilles Sassatelli, Pierre Guillemin:
  TEC-Tree: A Low-Cost, Parallelizable Tree for Efficient Defense Against Memory Replay Attacks. 289-302
  
• Stefan Tillich, Johann Großschädl:
  Power Analysis Resistant AES Implementation with Instruction Set Extensions. 303-319
  

Security Issues for RF and RFID

• Michael Hutter, Stefan Mangard, Martin Feldhofer:
  Power and EM Attacks on Passive 13.56 MHz RFID Devices. 320-333
  
• O. Savry, Florian Pebay-Peyroula, F. Dehmas, G. Robert, Jacques Reverdy:
  RFID Noisy Reader How to Prevent from Eavesdropping on the Communication? 334-345
  
• Gerald DeJean, Darko Kirovski:
  RF-DNA: Radio-Frequency Certificates of Authenticity. 346-363
  

Special Purpose Hardware for Cryptanalysis

• Tetsuya Izu, Jun Kogure, Takeshi Shimoyama:
  CAIRN 2: An FPGA Implementation of the Sieving Step in the Number Field Sieve Method. 364-377
  
• Guerric Meurice de Dormale, Philippe Bulens, Jean-Jacques Quisquater:
  Collision Search for Elliptic Curve Discrete Logarithm over GF(2 ^m ) with FPGA. 378-393
  
• Andrey Bogdanov, Thomas Eisenbarth, Andy Rupp:
  A Hardware-Assisted Realtime Attack on A5/2 Without Precomputations. 394-412
  

Side Channel Analysis

• Bruno Robisson, Pascal Manet:
  Differential Behavioral Analysis. 413-426
  
• François Macé, François-Xavier Standaert, Jean-Jacques Quisquater:
  Information Theoretic Evaluation of Side-Channel Resistant Logic Styles. 427-442
  

Problems and Solutions for Lightweight Devices

• Christophe Clavier, Jean-Sébastien Coron:
  On the Implementation of a Fast Prime Generation Algorithm. 443-449
  
• Andrey Bogdanov, Lars R. Knudsen, Gregor Leander, Christof Paar, Axel Poschmann, Matthew J. B. Robshaw, Yannick Seurin, C. Vikkelsoe:
  PRESENT: An Ultra-Lightweight Block Cipher. 450-466
  

Last update Tue May 22 23:23:34 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page