CDES 2010:
Las Vegas,
Nevada,
USA
Hamid R. Arabnia, Ashu M. G. Solo (Eds.):
Proceedings of the 2010 International Conference on Computer Design, CDES 2010, July 12-15, 2010, Las Vegas Nevada, USA.
CSREA Press 2010, ISBN 1-60132-135-X 
Algorithms,
Logic,
Circuit/Hardware Design,
and Tools
- Christina Smith, Scott Smith:
Comparison of NULL Convention Booth2 Multipliers.
3-9
- Calvin Chiem, Hussain Al-Asaad:
A Comparison of NMOS to PMOS Starved Buffer Implementations for the Delay Line in a PWM DC-DC Converters.
10-16
- Hussain Al-Asaad:
Time-Redundant Logic-Level Protection Mechanisms from Soft Errors in Digital Systems.
17-21
- Xiaopeng Li, Wei Sun, Hui Ma, Bangchun Wen:
Planning and Designing Model of the Synthesized Design Method.
22-25
- Nader Barsoum:
Application on Programming The PIC Controller For a Sensitive Motor Speed.
26-32
- Byoung Hong Lim, Inhyuk Kim, Young Ik Eom:
The Design and Implementation of Partial Virtual Machine for Device Driver Fault Isolation.
33-39
- Nahid Mirzaie, Seyyed Javad Seyyed Mahdavi, Karim Mohammadi:
Evolving More Testable Digital Combinational Circuits.
40-45
- M. Sharifi, M. Hamedanian, M. Naghizadeh:
Real Time Redundancy Study of a Exponential Time Dependent Model.
46-54
Power Analysis and Energy
HPC and Design Issues + FPGA + Embedded Systems
- Scott Smith, David Roclin, Jia Di:
Delay-Insensitive Cell Matrix.
67-73
- Freddy Bolanos, Jose Aedo, Fredy Rivera:
System - Level Partitioning for Embedded Systems Design Using Population - Based Incremental Learning.
74-80
- Takanori Matsuzaki, Nozomu Urashima, Makoto Amamiya:
Thread Control Mechanism for Multithreading Processor.
81-87
- Srinivasa Vemuru, Sravani Kristem, Mohammed Y. Niamat:
Built-In Self-Test Circuit Optimization for Embedded Cores.
88-92
- Dayah Iman, Nikrouz Faroughi:
A Pipelined Salsal20 Encryption Hardware Accelerator.
93-97
- Jong-Myon Kim, Yong-Min Kim, Cheol Hong Kim:
Performance Evaluation of Multimedia Extensions on Variable Many-Core Processors.
98-104
- Savithra Eratne, Claudia Romo, Eugene John, Byeong Kil Lee:
Leakage and Access Time Tradeoffs for Cache in High Performance Microprocessors.
105-108
- Hanuman Kumar Vudata, SeethaRamaiah P.:
An FPGA Based Digital Speech Processor for Auditory Prosthesis.
109-116
Novel Applications/Algorithms + Tools
Memory,
Cache,
Storage,
Files,
Networking + Device Drivers
- Shen-Ming Chung, Shun-Chieh Lin, Yi-Chen Chung:
A Dynamic ECC Scheme for Lengthening the Lifetime of Flash Memory.
133-139
- Byeong Kil Lee, Satish Raghunath, Eugene John:
Architectural Sensitivity Analysis on Network Workloads.
140-145
- Hiroki Yokoyama, Yuhei Horibe, Peng Zhang, Shinobu Miwa, Hironori Nakajo:
An Effective Replacement Policy Focusing on Lifetime of a Cache Line.
146-152
- Koji Hashimoto, Vasily G. Moshnyaga:
A Cost-Effective TCP/IP Offload Accelerator Design for Network Interface Controller.
153-159
- Hong Jun Choi, Young Jin Park, Seung Gu Kang, Cheol Hong Kim, Sung Woo Chung, Jong-Myon Kim, Dongseop Kwon:
Thermal-aware Duplicated Filter Cache for Improving Processor Reliability.
160-168
Power Reduction Strategies,
FPGA,
Nanotechnology,
and Multimedia Applications
- Hooman Jarollahi, Richard Hobson:
Dynamic Power Reduction in a Novel CMOS 5T-SRAM for Low-Power SoC.
169-175
- Mary Mehrnoosh Eshaghian-Wilner, Adam LeWinter:
A Survey of Nanotechnology Principles in Modern Computing Architectures.
176-181
- Mohammed Y. Niamat, Tejas Raviraj, Sowmya Panuganti, Srinivasa Vemuru:
Quantum-Dot Cellular Automata Implementation of FPGA Configurable Logic Blocks.
182-188
- Shereen Afifi, Ayman Wahba, Abd-Elmoneim Wahdan:
Memory Design for Multimedia Applications.
189-195
- Paramjit Kaur, Opinder Sharma, Gautham Thyagarajan:
Development of FPGA Chip for Laser- based Distance Measurer for Defense Applications.
196-199
- Kenny C. Gross, Kalyan Vaidyanathan:
Improved Energy Monitoring and Prognostics of Servers via High-Accuracy Real-Time Synchronization of Internal Telemetry Signals.
200-
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