CDES 2008:
Las Vegas,
Nevada,
USA
Hamid R. Arabnia (Ed.):
Proceedings of the 2008 International Conference on Computer Design, CDES 2008, Las Vegas, Nevada, USA, July 14-17, 2008.
CSREA Press 2008, ISBN 1-60132-056-6 
Algorithms,
Circuit/Hardware Design,
and Tools
- Xiang Xiao, Tuo Shi, Pranav Vaidya, Jaehwan John Lee:
R-tree: A Hardware Implementation.
3-9
- Jacob Pennock, M. Nasseh Tabrizi:
A Survey of Input Sensing and Processing Techniques for Multi-Touch Systems.
10-16
- Ranando King, Hai Jiang:
CSPA: An Adder Faster Than Carry-Lookahead.
17-22
- Pijush Bhattacharjee:
Efficient Synthesis of Symmetric Function.
23-29
- Yong-Hyuk Kim:
Improved Implementation Choices for Iterative Improvement Partitioning Algorithms on Circuits.
30-34
- Dimitrios Voudouris, Marinos Sampson, George K. Papakonstantinou:
Finding Minimal ESCT Expressions for Boolean Functions with Weight of up to 7.
35-41
- Yong-Sung Jeon, Sang-Woo Lee, Taek Yong Nam:
Design of Low-area Rijndael Hardware Core.
42-45
- Dongmahn Seo, Heonguil Lee, Inbum Jung:
Transcoding Load Distribution Policy for Wireless Mobile Clients.
46-52
- Gabriela Mogos:
Security of QImage File.
53-56
- Rohit Sharma, Vivek Kumar Sehgal, Nitin, Saumya Rawat, Vinodini Kapoor, Sonia Chadha:
Time-Domain Analysis of VLSI Interconnects Considering Oscillatory Inputs.
57-60
Power and Energy
High-Performance Systems and Design Issues + Applications + Tools/OS
Simulation,
Modeling,
and Testing
Memory,
Storage,
Files,
and Device Drivers
- Shinobu Miwa, Hironori Ichibayashi, Hidetsugu Irie, Masahiro Goshima, Hironori Nakajo, Shinji Tomita:
Low-Complexity Bypass Network Using Small RAM.
153-159
- William Grim, Stephen Blythe:
A User-Space Device Driver Framework.
160-166
- Jong-Min Jeong, Seung-Ho Park, Jung-Wook Park, Shin-Dug Kim, Charles C. Weems:
A Multi-Block Interleaving Structure for NAND Flash Memory Storage.
167-173
- Martin Uhl:
Capturing Dynamic Memory Structures.
174-180
- Oscar Camacho Nieto, Luis A. Villa Vargas, Osvaldo Espinosa:
High Performance Cache.
181-187
Late Papers
- Muthana Hamd:
Image Reconstruction Using Reconfigurable Hardware.
191-194
- Sager Gosavi, Waleed K. Al-Assadi, Sasikiran Burugapalli:
Analysis & Modeling of Substrate Noise in Domino CMOS Circuits.
195-200
- Srinivasa Vemuru, Ahmed Elkammar, Norman Scheinberg:
Subbus Control Line Impact on Effectiveness of Bus Encoding Schemes.
201-206
- M. Hamd, Abdesselam Bouzerdoum:
A VHDL Design for PCA.
207-210
- Mandar V. Joshi, Waleed K. Al-Assadi:
Nanowire Crossbar PLA with Adaptive Variable Redundancy.
211-217
- François Giamarchi, Laurent Capocchi, Dominique Federici, Paul Bisgambiglia:
High-Level Automatic Test Generation for VHDL Descriptions.
218-223
- Thanasin Bunnam, Arthit Thongtak:
An Approach for the Delay Simulation of D-Inverter in C-Ternary Logic Circuits.
224-228
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