16. ASYNC 2010:
Grenoble,
France
16th IEEE International Symposium on Asynchronous Circuits and Systems, ASYNC 2010, Grenoble, France, 3-6 May 2010.
IEEE Computer Society 2010, ISBN 978-0-7695-4032-0 
Logic and Physical Synthesis
Low-Power and Harvesting
- Omer Can Akgun, Joachim Neves Rodrigues, Jens Sparsø:
Minimum-Energy Sub-threshold Self-Timed Circuits: Design Methodology and a Case Study.
41-51
- Carlos Ortega, Jonathan Tse, Rajit Manohar:
Static Power Reduction Techniques for Asynchronous Circuits.
52-61
- Jean-Frédéric Christmann, Edith Beigné, Cyril Condemine, Nicolas Leblond, Pascal Vivet, G. Waltisperger, Jérôme Willemin:
Bringing Robustness and Power Efficiency to Autonomous Energy Harvesting Microsystems.
62-71
Synchronisers
- William J. Dally, Stephen G. Tell:
The Even/Odd Synchronizer: A Fast, All-Digital, Periodic Synchronizer.
75-84
- Jun Zhou, Maryam Ashouei, David Kinniment, Jos Huisken, Gordon Russell:
Extending Synchronization from Super-Threshold to Sub-threshold Region.
85-93
- Salomon Beer, Ran Ginosar, Michael Priel, Rostislav (Reuven) Dobkin, Avinoam Kolodny:
The Devolution of Synchronizers.
94-103
High Level Synthesis and Retiming
- John Hansen, Montek Singh:
A Fast Branch-and-Bound Approach to High-Level Synthesis of Asynchronous Systems.
107-116
- Gennette Gill, Montek Singh:
Automated Microarchitectural Exploration for Achieving Throughput Targets in Pipelined Asynchronous Systems.
117-127
- Mario R. Casu:
Improving Synchronous Elastic Circuits: Token Cages and Half-Buffer Retiming.
128-137
Power-Performance Optimisation
Arbitration,
Delay-Insensitivity,
GasP
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