8. ASYNC 2002:
Manchester,
UK
8th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2002), 9-11 April 2002, Manchester, UK.
IEEE Computer Society 2002, ISBN 0-7695-1540-1
High-Speed and Energy-Efficient Pipelines
Novel Self-Timed Circuit Experiments
Mixed Synchronous/Asynchronous Communication and Design
- Joep L. W. Kessels, Suk-Jin Kim, Ad M. G. Peeters, Paul Wielage:
Clock Synchronization through Handshake Signalling.
59-68
- George S. Taylor, Simon W. Moore, Robert D. Mullins, Peter Robinson:
Point to Point GALS Interconnect.
69-75
- Eckhard Grass, Bodhisatya Sarker, Koushik Maharatna:
A Dual-Mode Synchronous/Asynchronous CORDIC Processor.
76-83
- José A. Tierno, Sergey Rylov, Alexander Rylyakov, Montek Singh, Steven M. Nowick:
An Adaptively-Pipelined Mixed Synchronous-Asynchronous Digital FIR Filter Chip Operating at 1.3 GigaHertz.
84-95
Timing Analysis and Verification
High-Level Design and Analysis of Self-Timed Circuits - Luciano Lavagno
Production Testing - Chair:
Marly Roncken
- Frank te Beest, Kees van Berkel, Ad M. G. Peeters:
Adding Synchronous and LSSD Modes to Asynchronous Circuits.
161-170
- Amy Streich, Alex Kondratyev, Lief Sorensen:
Testing of Asynchronous Designs by "Inappropriate" Means: Synchronous Approach.
171-180
- Thomas Villiger, Stephan Oetiker, Frank K. Gürkaynak, Norbert Felber, Hubert Kaeslin, Wolfgang Fichtner:
A Functional Test Methodology for Globally-Asynchronous Locally-Synchronous Systems.
181-189
- D. J. Kinniment, Oleh V. Maevsky, Gordon Russell, Alexandre Yakovlev, Alexandre V. Bystrov:
On-Chip Structures for Timing Measurements and Test.
190-197
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