ASPLOS-X, 2002: San Jose, CA, USA

Kourosh Gharachorloo (Ed.): Proceedings of the 10th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-X), San Jose, California, USA, October 5-9, 2002. ACM Press 2002, ISBN 1-58113-574-2

SIGARCH Computer Architecture News 30(5), SIGOPS Operating Systems Review 36(5) December 2002, SIGPLAN Notices 37(10) October 2002

• Deborah Estrin:
  Keynote address: Sensor network research: emerging challenges for architecture, systems, and languages. 1-4
  

Multiprocessor synchronization and speculation

• Ravi Rajwar, James R. Goodman:
  Transactional lock-free execution of lock-based programs. 5-17
  
• José F. Martínez, Josep Torrellas:
  Speculative synchronization: applying thread-level speculation to explicitly parallel applications. 18-29
  
• Kevin M. Lepak, Mikko H. Lipasti:
  Temporally silent stores. 30-41
  

System performance and optimization

• Timothy Sherwood, Erez Perelman, Greg Hamerly, Brad Calder:
  Automatically characterizing large scale program behavior. 45-57
  
• Kazunori Ogata, Hideaki Komatsu, Toshio Nakatani:
  Bytecode fetch optimization for a Java interpreter. 58-67
  
• Tao Li, Lizy Kurian John, Anand Sivasubramaniam, Narayanan Vijaykrishnan, Juan Rubio:
  Understanding and improving operating system effects in control flow prediction. 68-80
  

Emerging systems

• Philip Levis, David E. Culler:
  Maté: a tiny virtual machine for sensor networks. 85-95
  
• Philo Juang, Hidekazu Oki, Yong Wang, Margaret Martonosi, Li-Shiuan Peh, Daniel Rubenstein:
  Energy-efficient computing for wildlife tracking: design tradeoffs and early experiences with ZebraNet. 96-107
  
• Darko Kirovski, Milenko Drinic, Miodrag Potkonjak:
  Enabling trusted software integrity. 108-120
  

Energy efficient systems

• Heng Zeng, Carla Schlatter Ellis, Alvin R. Lebeck, Amin Vahdat:
  ECOSystem: managing energy as a first class operating system resource. 123-132
  
• Raksit Ashok, Saurabh Chheda, Csaba Andras Moritz:
  Cool-Mem: combining statically speculative memory accessing with selective address translation for energy efficiency. 133-143
  
• Ruchira Sasanka, Christopher J. Hughes, Sarita V. Adve:
  Joint local and global hardware adaptations for energy. 144-155
  

Speculative threads

• Dongkeun Kim, Donald Yeung:
  Design and evaluation of compiler algorithms for pre-execution. 159-170
  
• Antonia Zhai, Christopher B. Colohan, J. Gregory Steffan, Todd C. Mowry:
  Compiler optimization of scalar value communication between speculative threads. 171-183
  
• Jeffrey T. Oplinger, Monica S. Lam:
  Enhancing software reliability with speculative threads. 184-196
  

Computer architecture

• J. Adam Butts, Gurindar S. Sohi:
  Dynamic dead-instruction detection and elimination. 199-210
  
• Changkyu Kim, Doug Burger, Stephen W. Keckler:
  An adaptive, non-uniform cache structure for wire-delay dominated on-chip caches. 211-222
  
• Shubhendu S. Mukherjee, Federico Silla, Peter J. Bannon, Joel S. Emer, Steven Lang, David Webb:
  A comparative study of arbitration algorithms for the Alpha 21364 pipelined router. 223-234
  

Communication abstractions and optimizations

• Hyong-youb Kim, Vijay S. Pai, Scott Rixner:
  Increasing web server throughput with network interface data caching. 239-250
  
• Eddie Kohler, Robert Morris, Benjie Chen:
  Programming language optimizations for modular router configurations. 251-263
  
• Muthian Sivathanu, Andrea C. Arpaci-Dusseau, Remzi H. Arpaci-Dusseau:
  Evolving RPC for active storage. 264-276
  

Coordinating memory

• Robert Cooksey, Stéphan Jourdan, Dirk Grunwald:
  A stateless, content-directed data prefetching mechanism. 279-290
  
• Michael I. Gordon, William Thies, Michal Karczmarek, Jasper Lin, Ali S. Meli, Andrew A. Lamb, Chris Leger, Jeremy Wong, Henry Hoffmann, David Maze, Saman P. Amarasinghe:
  A stream compiler for communication-exposed architectures. 291-303
  
• Emmett Witchel, Josh Cates, Krste Asanovic:
  Mondrian memory protection. 304-316
  

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