ANCS 2009: Princeton, New Jersey, USA

Peter Z. Onufryk, K. K. Ramakrishnan, Patrick Crowley, John Wroclawski (Eds.): Proceedings of the 2009 ACM/IEEE Symposium on Architecture for Networking and Communications Systems, ANCS 2009, Princeton, New Jersey, USA, October 19-20, 2009. ACM 2009, ISBN 978-1-60558-630-4

Pattern matching II

John Chapin:
Software radio: a broad change in RF communications systems design. 1
Jack Brassil, Jonathan M. Smith, Flavio Bonomi, Keren Bergman, Paul Congdon, Ivan Seskar, Steve Muir:
Networking hardware: what drives innovation? 2
Bruce Davie:
Revisiting the internet hourglass: core strength vs. middle-age spread. 3

Programmable platforms & components

Qiang Wu, Danai Chasaki, Tilman Wolf:
Simplifying data path processing in next-generation routers. 11-19
Lei Liu, Xinwen Zhang, Guanhua Yan, Songqing Chen:
Exploitation and threat analysis of open mobile devices. 20-29

Pattern matching I

Michela Becchi, Charlie Wiseman, Patrick Crowley:
Evaluating regular expression matching engines on network and general purpose processors. 30-39
Masanori Bando, N. Sertac Artan, H. Jonathan Chao:
LaFA: lookahead finite automata for scalable regular expression detection. 40-49
Danhua Guo, Guangdeng Liao, Laxmi N. Bhuyan, Bin Liu:
An adaptive hash-based multilayer scheduler for L7-filter on a highly threaded hierarchical multi-core server. 50-59

Poster session 1

Derek Pao:
A NFA-based programmable regular expression match engine. 60-61
Tao Zhang, Yonggang Wang, Lijun Zhang, Yang Yang:
High throughput architecture for packet classification using FPGA. 62-63
Hao Wang, Bill Lin:
A block-based reservation architecture for the implementation of large packet buffers. 64-65
Yaxuan Qi, Fei He, Xiang Wang, Xinming Chen, Yibo Xue, Jun Li:
OASis: towards extensible open-architecture services platforms. 66-67
Guangdeng Liao, Laxmi N. Bhuyan, Danhua Guo, Steve R. King:
EINIC: an architecture for high bandwidth network I/O on multi-core processors. 68-69
Yan Luo, Pablo Cascón, Eric Murray, Julio Ortega:
Accelerating OpenFlow switching with network processors. 70-71
Jasjit Singh, Yogeshwar Sonawane:
Multiplexing endpoints of HCA to achieve scalability for MPI applications: design, implementation and performance evaluation with uDAPL. 72-73
Nguyen Thanh Hoa, Kensuke Naoe, Yoshiyasu Takefuji:
Micro Secure Socket Layer (MSSL) for micro server. 74-75
Tian Song, Dongsheng Wang:
A path combinational method for multiple pattern matching. 76-77
Patrick P. C. Lee, Tian Bu, Girish P. Chandranmenon:
A lock-free, cache-efficient shared ring buffer for multi-core architectures. 78-79
Mike Schlansker, Jean Tourrilhes, Yoshio Turner, Jose Renato Santos:
Hash-based routing for scalable datacenters. 80-81
Lucas Vespa, Ning Weng:
Theoretic analysis of finite automata for memory-based pattern matching. 82-83

Performance analysis

Haiquan (Chuck) Zhao, Hao Wang, Bill Lin, Jun (Jim) Xu:
Design and performance analysis of a DRAM-based statistics counter array architecture. 84-93
David J. Miller, Philip M. Watts, Andrew W. Moore:
Motivating future interconnects: a differential measurement analysis of PCI latency. 94-103

Interconnects

Rohit Sunkam Ramanujam, Bill Lin:
Weighted random oblivious routing on torus networks. 104-112
Avinash Karanth Kodi, Randy Morris:
Design of a scalable nanophotonic interconnect for future multicores. 113-122
Rohit Sunkam Ramanujam, Bill Lin:
A novel 3D layer-multiplexed on-chip network. 123-132

High-speed lookup

Domenico Ficara, Stefano Giordano, Sailesh Kumar, Bill Lynch:
Divide and discriminate: algorithm for deterministic and fast hash lookups. 133-142
Ioannis Sourdis, Georgios Stefanakis, Ruben de Smet, Georgi Gaydadjiev:
Range Tries for scalable address lookup. 143-152
Michel Hanna, Socrates Demetriades, Sangyeun Cho, Rami G. Melhem:
Progressive hashing for packet processing using set associative memory. 153-162

Poster session 2

Junchen Jiang, Yi Tang, Bin Liu, Xiaofei Wang, Yang Xu:
SPC-FA: synergic parallel compact finite automaton to accelerate multi-string matching with low memory. 163-164
Juraj Blaho, Jan Korenek, Viktor Pus:
Memory optimization for packet classification algorithms. 165-166
Shakir James, Patrick Crowley:
ISP managed peer-to-peer. 167-168
Xin Huang, Shashank Shanbhag, Tilman Wolf:
Interfacing to a virtualized network infrastructure through network service abstractions. 169-170
Toshiro Yamauchi, Haowei Yuan, Patrick Crowley:
Implementing URL-based forwarding on a network processor-based router platform. 171-172
Benjamin Wun, Patrick Crowley, Arun Raghunath:
Parallelization of Snort on a multi-core platform. 173-174
Ritam Chakrovorty, Lucas Vespa, Ning Weng:
Testbed for evaluating worm containment systems. 175-176
Mario A. Gomez-Rodriguez, Víctor Jesús Sosa Sosa, Ivan López-Arévalo:
External storage middleware for wireless devices with limited resources. 177-178
Simon Hauger:
Designing high-speed packet processing tasks at arbitrary levels of abstraction: implementation and evaluation of a MIXMAP system. 179-180
Fei He, Yaxuan Qi, Yibo Xue, Jun Li:
SANS: a scalable architecture for network intrusion prevention with stateful frontend. 181-182
Arthur Mutter:
A novel hybrid SRAM/DRAM memory architecture for fast packet buffers. 183-184
Kyuhee Lim, Kyunghye Park, Hyesook Lim:
Binary search on levels using a Bloom filter for IPv6 address lookup. 185-186
Stefanos A. Nikolidakis, Vasileios Giotsas, Dimitris Vergados, Christos Douligeris:
A mobile healthcare system using IMS and the HL7 framework. 187-188

Pattern matching II

Yang Xu, Zhaobo Liu, Zhuoyuan Zhang, H. Jonathan Chao:
An ultra high throughput and memory efficient pipeline architecture for multi-match packet classification without TCAMs. 189-198
Chao Zhu, Yingke Xie, Mingshu Wang, Jizhong Han, Chengde Han:
Co-match: fast and efficient packet inspection for multiple flows. 199-208
Marco Canini, Wei Li, Martin Zádník, Andrew W. Moore:
Experience with high-speed automated application-identification for network-management. 209-218

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