6. ACSD 2006: Turku, Finland

Invited Paper

• Nicolas Halbwachs, Louis Mandel:
  Simulation and Verification of Asynchronous Systems by means of a Synchronous Model. 3-14
  

Asynchronous and Synchronous Systems I

• Tiberiu Seceleanu, Axel Jantsch:
  Communicating with Synchronized Environments. 15-24
  
• Amir Hossein Ghamarian, Marc Geilen, Sander Stuijk, Twan Basten, Bart D. Theelen, Mohammad Reza Mousavi, A. J. M. Moonen, Marco Bekooij:
  Throughput Analysis of Synchronous Data Flow Graphs. 25-36
  

Asynchronous and Synchronous Systems II

• Xu Wang, Marta Z. Kwiatkowska:
  On process-algebraic verification of asynchronous circuits. 37-46
  
• Javier Esparza, Petr Jancar, Alexander Miller:
  On the Complexity of Consistency and Complete State Coding for Signal Transition Graphs. 47-56
  
• Victor Khomenko, Agnes Madalinski, Alexandre Yakovlev:
  Resolution of Encoding Conflicts by Signal Insertion and Concurrency Reduction Based on STG Unfoldings. 57-68
  

Scheduling

• Cong Liu, Alex Kondratyev, Yosinori Watanabe, Alberto L. Sangiovanni-Vincentelli, Jörg Desel:
  Schedulability Analysis of Petri Nets Based on Structural Properties. 69-78
  
• Sunan Tugsinavisut, Roger Su, Peter A. Beerel:
  High-level Synthesis for Highly Concurrent Hardware Systems. 79-90
  

Timed Systems

• Patricia Bouyer, Pierre-Alain Reynier, Serge Haddad:
  Extended Timed Automata and Time Petri Nets. 91-100
  
• Karine Altisen, Franck Cassez, Stavros Tripakis:
  Monitoring and fault-diagnosis with digital clocks. 101-110
  
• Rachid Hadjidj, Hanifa Boucheneb:
  On-the-fly TCTL model checking for Time Petri Nets using state class graphs. 111-122
  

Algorithms

• Mark Schäfer, Walter Vogler, Ralf Wollowski, Victor Khomenko:
  Strategies for Optimised STG Decomposition. 123-132
  
• Henri Hansen, Antti Kervinen:
  Minimal Counterexamples in O(n log n) Memory and O(n^2) Time. 133-142
  

Stochastic Models

• Davide Cerotti, Davide D'Aprile, Susanna Donatelli, Jeremy Sproston:
  Verifying Stochastic Well-formed Nets with CSL Model-Checking Tools. 143-152
  
• Leïla Kloul, Juliana Küster Filipe:
  Modelling Mobility with UML2.0 and PEPA Nets. 153-164
  

Invited Paper

• Axel Jantsch:
  Models of Computation for Networks on Chip. 165-178
  

Model-Checking

• Roland Bouroulet, Hanna Klaudel, Elisabeth Pelz:
  Modelling and verification of authentication using enhanced net semantics of SPL (Security Protocol Language). 179-188
  
• Jörg Bauer, Ina Schaefer, Tobe Toben, Bernd Westphal:
  Specification and Verification of Dynamic Communication Systems. 189-200
  

Systems on Chips

• Jun Xu, Reza Sotudeh, Mark B. Josephs:
  Asynchronous Packet-Switching for Networks-on-Chip. 201-207
  
• Purandar Bhaduri, S. Ramesh:
  Synthesis of Synchronous Interfaces. 208-216
  
• Geoffrey M. Brown:
  Verification of a Data Synchronization Circuit For All Time. 217-228
  

Algebraic Approaches

• Shinjiro Kakita, Yosinori Watanabe, Douglas Densmore, Abhijit Davare, Alberto L. Sangiovanni-Vincentelli:
  Functional Model Exploration for Multimedia Applications via Algebraic Operators. 229-238
  
• Maciej Koutny, Giuseppe Pappalardo, Marta Pietkiewicz-Koutny:
  Towards an Algebra of Abstractions for Communicating Processes. 239-250
  

Semantics

• Arnim Wedig, Horst F. Wedde, Anca M. Lazarescu, Elisei Rotaru:
  Concurrency in Distributed Systems under Autonomous and Enforced Actions. 251-260
  
• Gabriel Juhás, Robert Lorenz, Sebastian Mauser:
  Synchronous + Concurrent + Sequential = Earlier than + Not later than. 261-272
  

Tool Papers

• Alexandre Hamez, Lom Hillah, Fabrice Kordon, Alban Linard, Emmanuel Paviot-Adet, Xavier Renault, Yann Thierry-Mieg:
  New features in CPN-AMI 3: focusing on the analysis of complex distributed systems. 273-275
  
• Sander Stuijk, Marc Geilen, Twan Basten:
  SDF³: SDF For Free. 276-278
  
• Kees M. van Hee, Olivia Oanea, Reinier Post, Lou J. Somers, Jan Martijn E. M. van der Werf:
  Yasper: a tool for workflow modeling and analysis. 279-282
  

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