3. ACSD 2003: Guimaraes, Portugal

Invited Papers

• Grant Martin:
  The Reality of System Design Today: Do Theory and Practice Meet? 3
  
• P. S. Thiagarajan:
  Cyclic Communicating Processes: Hierarchy and Verification. 4
  
• Ian Oliver:
  Model Driven Embedded Systems. 5
  

Regular Papers

• Jean-Pierre Talpin, Paul Le Guernic, Sandeep K. Shukla, Rajesh K. Gupta, Frederic Doucet:
  Polychrony for Formal Refinement-Checking in a System-Level Design Methodology. 9-19
  
• Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Watanabe:
  Case Studies of Model Checking for Embedded System Designs. 20-28
  
• Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Yosinori Watanabe:
  Quasi-Static Scheduling for Concurrent Architectures. 29-40
  
• Yves Bontemps, Pierre-Yves Schobbens:
  Synthesis of Open Reactive Systems from Scenario-Based Specifications. 41-50
  
• Victor Khomenko, Maciej Koutny, Alexandre Yakovlev:
  Detecting State Coding Conflicts in STG Unfoldings Using SAT. 51-60
  
• Javier Esparza:
  A Polynomial-Time Algorithm for Checking Consistency of Free-Choice Signal Transition Graphs. 61-70
  
• Mohammad Reza Mousavi, Michel A. Reniers, Twan Basten, Michel R. V. Chaudron:
  Separation of Concerns in the Formal Design of Real-Time Shared Data-Space Systems. 71-81
  
• Didier Buchs, Stanislav Chachkov, David Hurzeler:
  Modelling a Secure, Mobile, and Transactional System with CO-OPN. 82-91
  
• Laure Petrucci, Jonathan Billington, Lars Michael Kristensen, Zahid H. Qureshi:
  Developing a Formal Specification for the Mission System of a Maritime Surveillance Aircraft. 92-101
  
• Vincent Beaudenon, Emmanuelle Encrenaz, Jean Lou Desbarbieux:
  Design Validation of ZCSP with SPIN. 102-110
  
• Paolo Ballarini, Lorenzo Capra, Giuliana Franceschinis, Massimiliano De Pierro:
  Memory Fault Tolerance Software Mechanisms: Design and Configuration Support through SWN Models. 111-121
  
• Sotiris Moschoyiannis, Michael W. Shields:
  Component-Based Design: Towards Guided Composition. 122-131
  
• Elisabeth Pelz, Hans Fleischhack:
  Compositional High Level Petri Nets with Timing Constraints - A Comparison. 132-141
  
• Roberto Gorrieri, Fabio Martinelli, Marinella Petrocchi, Anna Vaccarelli:
  Compositional Verification of Integrity for Digital Stream Signature Protocols. 142-149
  
• Henri Hansen, Heikki Virtanen, Antti Valmari:
  Merging State-Based and Action-Based Verification. 150-156
  
• Abhik Roychoudhury, P. S. Thiagarajan:
  Communicating Transaction Processes. 157-166
  
• Adrianna Alexander, Wolfgang Reisig:
  Logic of Involved Variables - System Specification with Temporal Logic of Distributed Actions. 167-176
  
• João Paulo Barros, Luís Gomes:
  Modifying Petri Net Models by Means of Crosscutting Operations. 177-186
  
• Tuomo Pyhälä, Keijo Heljanko:
  Specification Coverage Aided Test Selection. 187-195
  
• Jaco van de Pol, Miguel Valero Espada:
  Verification of JavaSpaces^TM Parallel Programs. 196-205
  
• Luís Gomes, Anikó Costa:
  On Lifting of Statechart Structuring Mechanisms. 206-215
  
• Hermenegilda Macià, Valentín Valero Ruiz, Fernando Cuartero, Fernando L. Pelayo:
  A New Synchronization in Finite Stochastic Petri Box Calculus. 216-225
  

Tool Presentations

• Roman Jokl, Stanislav Racek:
  C-Sim version 5.0. 229-230
  
• Jean-Louis Boulanger:
  ABTOOLS: Another B Tool. 231-232
  
• Dag Björklund, Johan Lilius, Ivan Porres:
  Rialto Profile in the SMW Toolkit. 233-234
  
• Boualem Benatallah, Piotr Chrzastowski-Wachtel, Rachid Hamadi, Milton O'Dell, Adi Susanto:
  HiWorD: A Petri Net-Based Hierarchical Workflow Designer. 235-236
  
• Sander Stuijk, Twan Basten, Jan Ypma:
  CAST - A Task-Level Concurrency Analysis Tool. 237-238
  
• Federico Crazzolara, Giuseppe Milicia:
  A Framework for the Development of Protocols. 239-240
  
• Ammar Aljer, Philippe Devienne, Sophie Tison, Jean-Louis Boulanger, Georges Mariano:
  BHDL: Circuit Design in B. 241-242
  
• Agnes Madalinski:
  CONFRES: Interactive Coding Conflict Resolver Based on Core Visualisation. 243-244
  
• María-del-Mar Gallardo, Jesús Martínez, Pedro Merino, Ernesto Pimentel:
  Abstract Model Checking and Refinement of Temporal Logic in aSPIN. 245-246
  
• Juan José Sánchez Penas, Thomas Arts:
  VoDkaV Tool: Model Checking for Extracting Global Scheduler Properties from Local Restrictions. 247-248
  
• Jan Romberg, Jan Jürjens, Guido Wimmel, Oscar Slotosch, Gabor Hahn:
  AutoFOCUS and the MoDe Tool. 249-250
  

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