PACT 2009:
Raleigh,
North Carolina,
USA
PACT 2009, Proceedings of the 18th International Conference on Parallel Architectures and Compilation Techniques, 12-16 September 2009, Raleigh, North Carolina, USA.
IEEE Computer Society 2009, ISBN 978-0-7695-3771-9
Software Transactional Memory and Speculation
- Takayuki Usui, Reimer Behrends, Jacob Evans, Yannis Smaragdakis:
Adaptive Locks: Combining Transactions and Locks for Efficient Concurrency.
3-14
- Carlos Madriles, Pedro López, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González:
Anaphase: A Fine-Grain Thread Decomposition Scheme for Speculative Multithreading.
15-25
Best Papers
Accelerators
Power and Energy
Tools and Testing
Innovative Hardware
- Andrew D. Hilton, Neeraj Eswaran, Amir Roth:
CPROB: Checkpoint Processing with Opportunistic Minimal Recovery.
159-168
- Xiaowei Jiang, Yan Solihin, Li Zhao, Ravishankar Iyer:
Architecture Support for Improving Bulk Memory Copying and Initialization Performance.
169-180
- Myong Hyon Cho, Mieszko Lis, Keun Sup Shim, Michel A. Kinsy, Tina Wen, Srinivas Devadas:
Oblivious Routing in On-Chip Bandwidth-Adaptive Networks.
181-190
Scheduling and Adaptation
- Xiaotong Zhuang, Alexandre E. Eichenberger, Yangchun Luo, Kevin O'Brien, Kathryn M. O'Brien:
Exploiting Parallelism with Dependence-Aware Scheduling.
193-202
- Carlos Luque, Miquel Moretó, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Mateo Valero:
ITCA: Inter-task Conflict-Aware CPU Accounting for CMPs.
203-213
- Amir Hormati, Yoonseo Choi, Manjunath Kudlur, Rodric M. Rabbah, Trevor N. Mudge, Scott A. Mahlke:
Flextream: Adaptive Compilation of Streaming Applications for Heterogeneous Architectures.
214-223
Novel Cache Systems
Modeling and Evaluation
Hardware Transactional Memory
Compiler Optimizations
- Konrad Trifunovic, Dorit Nuzman, Albert Cohen, Ayal Zaks, Ira Rosen:
Polyhedral-Model Guided Loop-Nest Auto-Vectorization.
327-337
- Sandya S. Mannarswamy, Ramaswamy Govindarajan, Rishi Surendran:
Region Based Structure Layout Optimization by Selective Data Copying.
338-347
- Qingda Lu, Christophe Alias, Uday Bondhugula, Thomas Henretty, Sriram Krishnamoorthy, J. Ramanujam, Atanas Rountev, P. Sadayappan, Yongjian Chen, Haibo Lin, Tin-fook Ngai:
Data Layout Transformation for Enhancing Data Locality on NUCA Chip Multiprocessors.
348-357
Cache Management
Last update Mon Feb 13 04:32:37 2012
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