MSP 2004: Washington, DC, USA

Chen Ding, Stephen Blackburn (Eds.): Proceedings of the 2004 workshop on Memory System Performance, Washington, DC, USA, June 8, 2004. ACM 2004, ISBN 1-58113-941-1

Transformation

Motohiro Kawahito, Hideaki Komatsu, Toshio Nakatani:
Instruction combining for coalescing memory accesses using global code motion. 2-11
Qing Yi, Ken Kennedy, Haihang You, Keith Seymour, Jack Dongarra:
Automatic blocking of QR and LU factorizations for locality. 12-22
Michelle Mills Strout, Paul D. Hovland:
Metrics and models for reordering transformations. 23-34
Kathryn S. McKinley:
Polar opposites: next generation languages and architectures. 35

Memory Systems

Muhammad Shaaban, Edward Mulrane:
Improving trace cache hit rates using the sliding window fill mechanism and fill select table. 36-41
Darren J. Kerbyson, Michael Lang, Gene Patino, Hossein Amidi:
An empirical performance analysis of commodity memories in commodity servers. 42-50

Analysis and Language Support

David Koes, Mihai Budiu, Girish Venkataramani:
Programmer specified pointer independence. 51-59
Changpeng Fang, Steve Carr, Soner Önder, Zhenlin Wang:
Reuse-distance-based miss-rate prediction on a per instruction basis. 60-68

Last update Thu May 17 01:38:55 2012 CET by the DBLP Team —

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